Re: [PATCH v4 08/12] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC

<[email protected]> 於 2026年8月5日週三 下午9:29寫道：
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] Missing Frontend NIC (FE NIC) MCTP and FRU initialization for the Right Bridge Board (`i2c10mux0ch0`).
> --
>
> --- Patch [8]: [PATCH v4 08/12] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC ---
> commit dd43e6fac4e737bcb1c934de5c94c3846795897a
> Author: Andy Chung <[email protected]>
>
> ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC
>
> Add the mctp-controller property to enable frontend NIC management
> via PLDM over MCTP. Also add EEPROM device for NIC FRU and reorder
> the I2C virtual bus index according to the system silkscreen index.
>
> > diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts
> > index ff393ad7cdb79..703284721224f 100644
> > --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts
> > +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts
> [ ... ]
> > @@ -55,6 +74,106 @@ eeprom@51 {
> >       };
> >  };
> >
> > +// R Bridge Board
> > +&i2c10 {
> > +     multi-master;
> > +     mctp@10 {
> > +             compatible = "mctp-i2c-controller";
> > +             reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
> > +     };
> > +
> > +     i2c-mux@71 {
> > +             /delete-property/ i2c-mux-idle-disconnect;
> > +
>
> [Severity: Medium]
> Is the Frontend NIC (FE NIC) configuration missing here for the Right Bridge
> Board?
No, there is no FE NIC for Right Bridge Board.

>
> The &i2c10 override configures channels 1-4 for the Backend NICs but omits
> channel 0 (i2c10mux0ch0). The Left Bridge Board (&i2c11) includes a Frontend
> NIC on channel 0, and an alias for i2c10mux0ch0 was added in this patch.
>
> Does i2c10mux0ch0 need to be populated with mctp-controller and the FRU
> EEPROM here?
No.

>
> > +             i2c10mux0ch1: i2c@1 {
> > +                     mctp-controller;
> > +                     // BE NIC FRU
> > +                     eeprom@50 {
> > +                             compatible = "atmel,24c32";
> > +                             reg = <0x50>;
> > +                     };
> > +             };
>
> --
> Sashiko AI review · https://sashiko.dev/#/patchset/20260805-anacapa-devlop-phase-devicetree-v4-0-5d67e0efa6c5@gmail.com?part=8