Re: [PATCH 4/6] riscv: dts: spacemit: add USB2.0 controller nodes for K1

On 8/12/2026 5:51 PM, [email protected] wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> [...]
>> @@ -1291,6 +1307,30 @@ storage-bus {
>>  			#size-cells = <2>;
>>  			dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
>>  
>> +			usb2_0: usb@c0900000 {
>> +				compatible = "spacemit,k1-usb2";
>> +				reg = <0x0 0xc0900000 0x0 0x4100>;
>> +				interrupts = <105>;
>> +				clocks = <&syscon_apmu CLK_USB_AXI>;
>> +				resets = <&syscon_apmu RESET_USB_AXI>;
>> +				phys = <&usbphy0>;
>> +				phy-names = "usb-phy";
>> +				dr_mode = "otg";
>> +				status = "disabled";
>> +			};
>> +
>> +			usb2_1: usb@c0980000 {
> 
> [Severity: High]
> This isn't a bug introduced by this patch, but will these new USB controllers
> fail to perform DMA operations because of the storage-bus node's dma-ranges
> property?
> 
> The parent storage-bus node defines:
> dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
> 
> This restricts DMA accesses to physical addresses between 0x0 and 0x7FFFFFFF.
> Since the system RAM on this SoC starts at 0x100000000 (above the 4GB
> boundary), will the kernel's DMA subsystem reject mappings for data buffers
> or descriptors located in RAM?
> 
> Placing these new DMA-capable USB nodes under storage-bus seems to guarantee
> they will fail to map memory.
> 
>> +				compatible = "spacemit,k1-usb2";
>> +				reg = <0x0 0xc0980000 0x0 0x4100>;
>> +				interrupts = <118>;
>> +				clocks = <&syscon_apmu CLK_USB_P1>;
>> +				resets = <&syscon_apmu RESET_USBP1_AXI>;
>> +				phys = <&usbphy1>;
>> +				phy-names = "usb-phy";
>> +				dr_mode = "host";
>> +				status = "disabled";
>> +			};
>> +
>>  			usb_dwc3: usb@c0a00000 {
>>  				compatible = "spacemit,k1-dwc3";
>>  				reg = <0x0 0xc0a00000 0x0 0x10000>;
> 

I am pretty sure this would not be a problem. The SpacemiT K1 have 0~2G as part
of the system RAM, the default dma mask of these device would be 32bit, and there
is swiotlb would help with the mapping of high memory. So the DMA configuration
correctly works here. Thank you sashiko.