Re: [PATCH v4 3/4] gpio: pl061: add Ambarella CV75 register layout variant
Linus Walleij <[email protected]>
| Newsgroups | dev.linux.lists.sashiko-reviews,org.kernel.vger.linux-devicetree |
|---|---|
| Message-ID | <CAD++jL=i=3CoEmzna=TQ5PK_SzvpEQvCd2kfH-LQyiX_JOjp-Q@mail.gmail.com> |
On Fri, Aug 14, 2026 at 8:35 AM <[email protected]> wrote: > Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider: > - [High] Global replacement of strictly ordered MMIO accessors with relaxed variants strips required memory barriers, risking device synchronization and IRQ storms. I think this can be safely ignored. > - [High] Unconditional clearing of the Alternate Function Select (`afsel`) register in probe forces all pins to GPIO mode, breaking bootloader-configured peripherals. You might want to look into this. Yours, Linus Walleij