Re: [RFC PATCH v3 5/6] KVM: SVM: Add support for AMD IOMMU Guest APIC Physical Processor Interrupt (GAPPI)

On Mon, Aug 17, 2026, Sairaj Kodilkar wrote:
> On 8/13/2026 3:29 AM, Sean Christopherson wrote:
> > diff --git arch/x86/kvm/svm/avic.c arch/x86/kvm/svm/avic.c
> > index c5b1d294b15a..c9a6da646c8e 100644
> > --- arch/x86/kvm/svm/avic.c
> > +++ arch/x86/kvm/svm/avic.c
> > @@ -1020,6 +1020,9 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu,
> >  
> >         lockdep_assert_held(&svm->ir_list_lock);
> >  
> > +       if (ga_log_intr && gappi && kvm_can_use_device_posted_irqs(vcpu->kvm))
> > +               kvm_pi_enable_wakeup_handler(vcpu);
> > +
> 
> I am not sure what you mean here, because pi_enable_wakeup_handler does
> more than just manipulating the wakeup list, it also updates pi
> descriptor which is Intel specific, 

Sorry, got ahead of myself.  I was envisioning a helper that for just the common
part, e.g.

void kvm_pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)
{
	lockdep_assert_irqs_disabled();

	/*
	 * Acquire the wakeup lock using the "sched out" context to workaround
	 * a lockdep false positive.  When this is called, schedule() holds
	 * various per-CPU scheduler locks.  When the wakeup handler runs, it
	 * holds this CPU's wakeup lock while calling try_to_wake_up(), which
	 * can eventually take the aforementioned scheduler locks, which causes
	 * lockdep to assume there is deadlock.
	 *
	 * Deadlock can't actually occur because IRQs are disabled for the
	 * entirety of the sched_out critical section, i.e. the wakeup handler
	 * can't run while the scheduler locks are held.
	 */
	raw_spin_lock_nested(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu),
			     PI_LOCK_SCHED_OUT);
	list_add_tail(&vcpu->pi_wakeup_list,
		      &per_cpu(wakeup_vcpus_on_cpu, vcpu->cpu));
	raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
}

> We have following two options:
> 
> Option A:
> Adding a new x86_ops
> 
> avic_update_iommu_vcpu_affinity
> 	kvm_pi_enable_wakeup_handler
> 		list handling
> 		kvm_x86_callback(configure_pi)
> 			IOMMU callbacks
> 
> 
> The new x86_ops makes sure that irte and pi descriptor are configured
> correctly.
> 
> Option B:
> Common list handling
> 
> The svm and vmx will share function for list handling but IRTE/PI setup
> code will remain same.
> 
> avic_update_iommu_vcpu_affinity/pi_enable_wakeup_handler
> 	kvm_add_to_wakeup_list
> 		list handling
> 	IOMMU callbacks

Definitely option B.