Re: [PATCH] PCI/ASPM: Clear L1SS capability when L1 latency is unacceptable
"Aniket ." <[email protected]>
| Newsgroups | dev.linux.lists.sashiko-reviews,org.kernel.vger.linux-pci |
|---|---|
| Message-ID | <CAMmmMt2iymRYnd6iVjSOBGqMu+i=AqJ9g-se44XfNfP1sVB5+A@mail.gmail.com> |
> Because the capability was stripped earlier in pcie_aspm_check_latency(), > this condition evaluates to false. Will this bypass the hardware cleanup > routine, leaving stale BIOS configurations active and causing L1 to be > disabled while L1SS remains enabled in hardware? Yeah this might lead to inconsistent states between the L1SS hardware register and the software variable. Fixing this in v2.