Re: [PATCH v2 1/4] dt-bindings: display: renesas,rzg2l-du: Add RZ/T2H and RZ/N2H support

On Fri, May 8, 2026 at 9:22 PM <[email protected]> wrote:
>
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Low] The conditional constraints for renesas,r9a09g077-du fail to explicitly disallow port@1, permitting invalid device trees to silently pass validation.
> --
>
> commit cd9bf5724c5d57e0dd67fd27e0187153179b0578
> Author: Lad Prabhakar <[email protected]>
>
> dt-bindings: display: renesas,rzg2l-du: Add RZ/T2H and RZ/N2H support
>
> This commit documents the Display Unit (DU) support for the RZ/T2H and RZ/N2H
> SoCs. It adds new compatible strings and updates the allOf constraints to
> handle the SoCs' specific register differences and lack of reset control.
>
> > diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> > index 2cc66dcef870a..18776ac9e7c7e 100644
> > --- a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> > +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> [ ... ]
> > @@ -95,7 +98,9 @@ allOf:
> >        properties:
> >          compatible:
> >            contains:
> > -            const: renesas,r9a07g043u-du
> > +            enum:
> > +              - renesas,r9a07g043u-du
> > +              - renesas,r9a09g077-du
> >      then:
> >        properties:
> >          ports:
> > @@ -137,6 +142,17 @@ allOf:
> >
> >            required:
> >              - port@0
>
> Should we also explicitly set port@1 to false here?
>
> The base schema for 'ports' allows both 'port@0' and 'port@1' via the
> patternProperty '^port@[0-1]$'. By not explicitly disallowing port@1 in this
> conditional block for the single-port RZ/T2H DU variant, would a malformed
> device tree containing an extra port@1 incorrectly pass schema validation?
>
A patch for this fix already exists [0]; I'll post this fix as part of
this series.

https://lore.kernel.org/all/d1e0d4e0fe74e60345a3d043fb4f9128c1057638.1778141145.git.tommaso.merciai.xr@bp.renesas.com/

Cheers,
Prabhakar