Re: [PATCH 1/5] dt-bindings: pci: Add Sophgo SG2042 PCIe host
Chen Wang <[email protected]>
| Newsgroups | dev.linux.lists.sophgo,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci |
|---|---|
| Message-ID | <MAUPR01MB11072CCB9E907768E89660F2DFE07A@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM> |
On 8/31/2025 12:47 PM, Manivannan Sadhasivam wrote: > On Thu, Aug 28, 2025 at 10:16:54AM GMT, Chen Wang wrote: >> From: Chen Wang <[email protected]> >> >> Add binding for Sophgo SG2042 PCIe host controller. >> >> Signed-off-by: Chen Wang <[email protected]> >> --- >> .../bindings/pci/sophgo,sg2042-pcie-host.yaml | 66 +++++++++++++++++++ >> 1 file changed, 66 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml >> >> diff --git a/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml b/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml >> new file mode 100644 >> index 000000000000..2cca3d113d11 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml >> @@ -0,0 +1,66 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pci/sophgo,sg2042-pcie-host.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Sophgo SG2042 PCIe Host (Cadence PCIe Wrapper) >> + >> +description: >> + Sophgo SG2042 PCIe host controller is based on the Cadence PCIe core. >> + >> +maintainers: >> + - Chen Wang <[email protected]> >> + >> +properties: >> + compatible: >> + const: sophgo,sg2042-pcie-host >> + >> + reg: >> + maxItems: 2 >> + >> + reg-names: >> + items: >> + - const: reg >> + - const: cfg >> + >> + vendor-id: >> + const: 0x1f1c >> + >> + device-id: >> + const: 0x2042 >> + >> + msi-parent: true >> + >> +allOf: >> + - $ref: cdns-pcie-host.yaml# >> + >> +required: >> + - compatible >> + - reg >> + - reg-names >> + - vendor-id >> + - device-id > Why are these IDs 'required'? The default IDs are invalid? I find the default IDs I read from the SoC is still that for Cadence, it would confused when I run lspci, so I replace the IDs for Sophgo. Anyway, it's ok for me to remove IDs as "required" in bindings but still set it in DTS. Thanks, Chen > > - Mani >