[PATCH v2 0/4] Add SPI NOR DTS node for SG2042 SoC and boards using it

Zixian Zeng <[email protected]>
Newsgroups dev.linux.lists.sophgo,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel
Message-ID <[email protected]>
[PATCH 1/4] and [PATCH 2/4] are copied from patch set [1]
[PATCH v4 4/4] with content changes:

According to SG2042 Pioneer and SG2042_EVB_V1/V2 schematics, SPI-NOR Flash
cannot support QSPI due to hardware design.
Thus spi-(tx|rx)-bus-width must be set to 1.

Link: https://lore.kernel.org/linux-riscv/[email protected]/ [1]

Signed-off-by: Zixian Zeng <[email protected]>
---
Changes in v2:
- Change value of spi-(tx|rx)-bus-width properties to 1 of all boards.
- Decrease spi-max-frequency to 50MHz.
- Link to v1: https://lore.kernel.org/r/[email protected]

---
Zixian Zeng (4):
      riscv: dts: sophgo: Add SPI NOR node for SG2042
      riscv: dts: sophgo: Enable SPI NOR node for PioneerBox
      riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
      riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2

 arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts       | 24 ++++++++++++++++++++++
 arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts       | 12 +++++++++++
 .../riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts | 24 ++++++++++++++++++++++
 arch/riscv/boot/dts/sophgo/sg2042.dtsi             | 24 ++++++++++++++++++++++
 4 files changed, 84 insertions(+)
---
base-commit: 8a4fdd09c96f6713e6cb47d36e9f9dd6f6694215
change-id: 20250813-sfg-spidts-ee56044969fe

Best regards,
-- 
Zixian Zeng <[email protected]>
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