[PATCH 0/4] Add PCIe support in DTS for Sophgo SG2042 SoC
Chen Wang <[email protected]>
| Newsgroups | dev.linux.lists.sophgo,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Chen Wang <[email protected]> This new patch set is a continuation of the previous patchset "[PATCH v3 0/7] Add PCIe support to Sophgo SG2042 SoC" [1]. The drivers and bindings have already been merged into the kernel mainline, and this patchset will focus on submitting the remaining DTS changes into the mainline. This patchset is based on v6.18-rc1 and the only changes since v3 is a fix to address the comments from Manivannan Sadhasivam to make sure PCI address of the I/O port to start from 0. Link: https://lore.kernel.org/linux-riscv/[email protected]/ [1] Chen Wang (4): riscv: sophgo: dts: add PCIe controllers for SG2042 riscv: sophgo: dts: enable PCIe for PioneerBox riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0 arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts | 12 +++ arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 12 +++ .../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 12 +++ arch/riscv/boot/dts/sophgo/sg2042.dtsi | 88 +++++++++++++++++++ 4 files changed, 124 insertions(+) base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787 -- 2.34.1