[PATCH 3/4] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
Chen Wang <[email protected]>
| Newsgroups | dev.linux.lists.sophgo,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <1ad96631cc9d9d7403a2bed5585d856fa101a2ef.1760929111.git.unicorn_wang@outlook.com> |
From: Chen Wang <[email protected]> Enable PCIe controllers for Sophgo SG2042_EVB_V1.X board, which uses SG2042 SoC. Signed-off-by: Han Gao <[email protected]> Signed-off-by: Chen Wang <[email protected]> --- arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts index 3320bc1dd2c6..a186d036cf36 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts +++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts @@ -164,6 +164,18 @@ phy0: phy@0 { }; }; +&pcie_rc0 { + status = "okay"; +}; + +&pcie_rc1 { + status = "okay"; +}; + +&pcie_rc2 { + status = "okay"; +}; + &pinctrl { emmc_cfg: sdhci-emmc-cfg { sdhci-emmc-wp-pins { -- 2.34.1