Re: [GIT PULL] RISC-V Sophgo Devicetrees for v6.19
Chen Wang <[email protected]>
| Newsgroups | dev.linux.lists.sophgo,dev.linux.lists.soc,org.infradead.lists.linux-riscv |
|---|---|
| Message-ID | <PN6PR01MB11717C796975CF645B54F11A1FEDBA@PN6PR01MB11717.INDPRD01.PROD.OUTLOOK.COM> |
Hello, Arnd, Have you picked this PR yet? I see the merge window for v6.19 has opened this week, but I haven't received your email confirming your applying. So I'm pinging you. If you've already picked it, please just ignore this ping email. Kind regards, Chen On 11/19/2025 3:24 PM, Chen Wang wrote: > Hey Arnd, > > Please pull this dt changes for RISC-V/Sophgo. > > Thanks, > > Chen > > The following changes since commit > 3a8660878839faadb4f1a6dd72c3179c1df56787: > > Linux 6.18-rc1 (2025-10-12 13:42:36 -0700) > > are available in the Git repository at: > > https://github.com/sophgo/linux.git tags/riscv-sophgo-dt-for-v6.19 > > for you to fetch changes up to af5eb17ff893bf6e52680a31059e1816749c2d20: > > riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2 > (2025-11-18 09:17:55 +0800) > > ---------------------------------------------------------------- > RISC-V Devicetrees for v6.19 > > Sophgo: > > For CV18xx serials: > Add top syscon device related DTS change, the top system > controller provides register access to configure some > misc modules, such as usb2 phy and a dma multiplexer. > > For SG2042: > There are two changes. The first one is to add DTS > definition for PCIe controllers for SoC SG2042 and > boards such as Pioneerbox/EVB_V1/EVB_V2 uses SG2042. > The second one is to add DTS to support SPI-NOR flash > controllers for this SoC and the same for related boards. > > Signed-off-by: Chen Wang <[email protected]> > > ---------------------------------------------------------------- > Chen Wang (4): > riscv: sophgo: dts: add PCIe controllers for SG2042 > riscv: sophgo: dts: enable PCIe for PioneerBox > riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X > riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0 > > Longbin Li (3): > dt-bindings: soc: sophgo: add TOP syscon for CV18XX/SG200X > series SoC > riscv: dts: sophgo: Add syscon node for cv18xx > riscv: dts: sophgo: Add USB support for cv18xx > > Zixian Zeng (4): > riscv: dts: sophgo: Add SPI NOR node for SG2042 > riscv: dts: sophgo: Enable SPI NOR node for PioneerBox > riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1 > riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2 > > .../soc/sophgo/sophgo,cv1800b-top-syscon.yaml | 80 +++++++++++++++ > arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 5 + > arch/riscv/boot/dts/sophgo/cv180x.dtsi | 42 ++++++++ > arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts | 5 + > .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 5 + > arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts | 36 +++++++ > arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 24 +++++ > .../riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts | 36 +++++++ > arch/riscv/boot/dts/sophgo/sg2042.dtsi | 112 > +++++++++++++++++++++ > 9 files changed, 345 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/soc/sophgo/sophgo,cv1800b-top-syscon.yaml >