[GIT PULL] RISC-V Sophgo Devicetrees for v6.20

Chen Wang <[email protected]>
Newsgroups dev.linux.lists.sophgo,dev.linux.lists.soc
Message-ID <MA5PR01MB12500D99CB14A37FBA543DD36FE96A@MA5PR01MB12500.INDPRD01.PROD.OUTLOOK.COM>
Hey Arnd,

Please pull this dt changes for RISC-V/Sophgo.

Thanks,

Chen

The following changes since commit 8f0b4cce4481fb22653697cced8d0d04027cb1e8:

   Linux 6.19-rc1 (2025-12-14 16:05:07 +1200)

are available in the Git repository at:

   https://github.com/sophgo/linux.git tags/riscv-sophgo-dt-for-v6.20

for you to fetch changes up to f16ae81b80ca4e721f4c4ed1f28390115f7721eb:

   riscv: dts: sophgo: sg2044: Add "b" ISA extension (2026-01-20 
09:03:37 +0800)

----------------------------------------------------------------
RISC-V Devicetrees for v6.20

Sophgo:

For CV18xx serials:
Update RX/TX FIFO size to fix the USB transfer issue.

For SG2042:
Optimize the DTS file format, including moving PLIC/CLINT
nodes into cpu dtsi and sorting peripheral nodes by address.
In addition, we also enable RTC for Pioneerbox.

For SG2044:
Add "b" ISA extension to fix dtbs_check warnings.

Signed-off-by: Chen Wang <[email protected]>

----------------------------------------------------------------
Anton D. Stavinskii (1):
       riscv: dts: sophgo: cv180x: fix USB dwc2 FIFO sizes

Guodong Xu (1):
       riscv: dts: sophgo: sg2044: Add "b" ISA extension

Inochi Amaoto (2):
       riscv: dts: sophgo: Move PLIC and CLINT node into CPU dtsi
       riscv: dts: sophgo: fix the node order of SG2042 peripheral

Michael Orlitzky (1):
       riscv: dts: sophgo: enable hardware clock (RTC) on the Milk-V Pioneer

  arch/riscv/boot/dts/sophgo/cv180x.dtsi             |   4 +-
  arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi        | 305 +++++++++++++
  .../riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts |  21 +
  arch/riscv/boot/dts/sophgo/sg2042.dtsi             | 479 
++++-----------------
  arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi        | 256 +++++------
  5 files changed, 544 insertions(+), 521 deletions(-)
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