[PATCH v3 13/16] PCI: dwc: spacemit-k1: Use cached PCIe capability offset
Hans Zhang <[email protected]> Mon, 20 Jul 2026 23:06:16 +0800
| Newsgroups | dev.linux.lists.sophgo,dev.linux.lists.imx,dev.linux.lists.spacemit,org.infradead.lists.linux-amlogic,org.infradead.lists.linux-riscv,org.infradead.lists.linux-rockchip,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci,org.kernel.vger.linux-tegra,org.ozlabs.lists.linuxppc-dev |
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| Message-ID | <[email protected]> |
Because .init runs before core caching, we call dw_pcie_get_pcie_cap() inside k1_pcie_disable_aspm_l1() to get the capability base, then add PCI_EXP_LNKCAP. Hardware is already enabled at this point. Signed-off-by: Hans Zhang <[email protected]> --- In pcie-spacemit-k1, the call chain is: static const struct dw_pcie_host_ops k1_pcie_host_ops = { .init = k1_pcie_init, }; k1_pcie_init() -> k1_pcie_disable_aspm_l1() -> dw_pcie_find_capability() --- drivers/pci/controller/dwc/pcie-spacemit-k1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-spacemit-k1.c b/drivers/pci/controller/dwc/pcie-spacemit-k1.c index 04241df8fd59..3e741324f44a 100644 --- a/drivers/pci/controller/dwc/pcie-spacemit-k1.c +++ b/drivers/pci/controller/dwc/pcie-spacemit-k1.c @@ -116,7 +116,7 @@ static void k1_pcie_disable_aspm_l1(struct k1_pcie *k1) u8 offset; u32 val; - offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); + offset = dw_pcie_get_pcie_cap(pci); offset += PCI_EXP_LNKCAP; dw_pcie_dbi_ro_wr_en(pci); -- 2.34.1