Re: [PATCH v2 0/4] riscv: spacemit: k3: some clock fixes related to PCIe

Yixun Lan <[email protected]>
Newsgroups dev.linux.lists.spacemit,org.infradead.lists.linux-riscv,org.kernel.vger.linux-clk,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel
Message-ID <178098282978.4045227.9791467212023885311.b4-ty@b4>
On Mon, 11 May 2026 02:59:08 +0000, Yixun Lan wrote:
> Here are some fixes for previous patch set in order to make PCIe work,
> Add PCIe DBI clock which was missing, Fix the parent clock, And correct
> the PCIe Clock CTRL register offset.

Applied, thanks!

[1/4] clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock
      https://github.com/spacemit-com/linux/commit/d8a4cef90b1a4ae9196a5bfba683eb9a0c75acdc
[2/4] clk: spacemit: k3: Fix PCIe clock register offset
      https://github.com/spacemit-com/linux/commit/2f20c859a82a291483a8b3f01cbfbb1642782a14
[3/4] dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
      https://github.com/spacemit-com/linux/commit/7a2db70a3196717bfb01415b6dde1f90d4291ab1
[4/4] clk: spacemit: k3: Add PCIe DBI clock
      https://github.com/spacemit-com/linux/commit/a37c75d7b5bb7f3344b0e639b313ac5ace6244ff

Best regards,
-- 
Yixun Lan <[email protected]>
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