[PATCH] riscv: dts: spacemit: k3: Enable SD card support
Yixun Lan <[email protected]>
| Newsgroups | dev.linux.lists.spacemit,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add the device tree node of SDHCI-0 controller which found on CoM260-IFX board, it's currenty used for Micro SD card slot, and one GPIO pin is configured as card insertion/removal detection pin, the slot use 4-bit data bus, and up support to SDR104 speed mode. Signed-off-by: Yixun Lan <[email protected]> --- arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts | 18 +++++++++++ arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi | 44 ++++++++++++++++++++++++++ arch/riscv/boot/dts/spacemit/k3.dtsi | 13 ++++++++ 3 files changed, 75 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts index 238bb03d0e9e..e7f76cd24b90 100644 --- a/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts +++ b/arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts @@ -19,3 +19,21 @@ chosen { stdout-path = "serial0:115200n8"; }; }; + +&sdhci0 { + pinctrl-names = "default","uhs"; + pinctrl-0 = <&mmc1_cfg>; + pinctrl-1 = <&mmc1_uhs_cfg>; + bus-width = <4>; + cd-gpios = <&gpio K3_GPIO(4) GPIO_ACTIVE_HIGH>; + no-mmc; + no-sdio; + disable-wp; + cap-sd-highspeed; + vmmc-supply = <&aldo4>; + vqmmc-supply = <&aldo1>; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; +}; diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi index 3ee1471f3798..6b808f890a28 100644 --- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi +++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi @@ -689,4 +689,48 @@ uart0-0-pins { drive-strength = <25>; }; }; + + mmc1_cfg: mmc1-cfg { + mmc1-data-cmd-pins { + pinmux = <K3_PADCONF(132, 0)>, /* mmc1 dat3 */ + <K3_PADCONF(133, 0)>, /* mmc1 dat2 */ + <K3_PADCONF(134, 0)>, /* mmc1 dat1 */ + <K3_PADCONF(135, 0)>, /* mmc1 dat0 */ + <K3_PADCONF(136, 0)>; /* mmc1 cmd */ + + bias-pull-up = <0>; + drive-strength = <25>; + power-source = <3300>; + }; + + mmc1-clk-pins { + pinmux = <K3_PADCONF(137, 0)>; /* mmc1 clk */ + + bias-pull-down; + drive-strength = <25>; + power-source = <3300>; + }; + }; + + mmc1_uhs_cfg: mmc1-uhs-cfg { + mmc1-uhs-data-cmd-pins { + pinmux = <K3_PADCONF(132, 0)>, /* mmc1 dat3 */ + <K3_PADCONF(133, 0)>, /* mmc1 dat2 */ + <K3_PADCONF(134, 0)>, /* mmc1 dat1 */ + <K3_PADCONF(135, 0)>, /* mmc1 dat0 */ + <K3_PADCONF(136, 0)>; /* mmc1 cmd */ + + bias-pull-up = <0>; + drive-strength = <21>; + power-source = <1800>; + }; + + mmc1-uhs-clk-pins { + pinmux = <K3_PADCONF(137, 0)>; /* mmc1 clk */ + + bias-pull-down; + drive-strength = <21>; + power-source = <1800>; + }; + }; }; diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi index 19fc9b49668e..dabb0d5e6bad 100644 --- a/arch/riscv/boot/dts/spacemit/k3.dtsi +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi @@ -1099,6 +1099,19 @@ pll: clock-controller@d4090000 { #clock-cells = <1>; }; + sdhci0: mmc@d4280000 { + compatible = "spacemit,k3-sdhci"; + reg = <0x0 0xd4280000 0x0 0x200>; + clocks = <&syscon_apmu CLK_APMU_SDH_AXI>, + <&syscon_apmu CLK_APMU_SDH0>; + clock-names = "core", "io"; + resets = <&syscon_apmu RESET_APMU_SDH_AXI>, + <&syscon_apmu RESET_APMU_SDH0>; + reset-names = "axi", "sdh"; + interrupts = <99 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + syscon_apmu: system-controller@d4282800 { compatible = "spacemit,k3-syscon-apmu"; reg = <0x0 0xd4282800 0x0 0x400>; --- base-commit: 38d5f73d1f5af60d87047b981736b89521e49213 change-id: 20260609-07-k3-enable-sd-e1ddf090e87f Best regards, -- Yixun Lan <[email protected]>