[PATCH v2 5/5] riscv: dts: spacemit: improve RTL8211F PHY configuration on K3 Pico-ITX board
Aurelien Jarno <[email protected]>
| Newsgroups | dev.linux.lists.spacemit,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Vendor kernel enabled ALDPS (Advanced Link Down Power Saving) on the RTL8211F PHY to save power when link down. Vendor kernel also disabled the 125MHz clkout clock signal, and indeed the schematics confirms that it only goes to a test point (TP14), so let's do the same. Signed-off-by: Aurelien Jarno <[email protected]> --- arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts index bf64b6c6f867f..e12d798b48a49 100644 --- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts +++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts @@ -234,6 +234,8 @@ phy0: phy@1 { reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; reset-deassert-us = <10000>; + realtek,aldps-enable; + realtek,clkout-disable; }; }; }; -- 2.53.0