Re: [PATCH v2] riscv: mm: fix SWIOTLB initialization for systems with DRAM above 4GB
"Troy Mitchell" <[email protected]> Mon, 27 Jul 2026 00:12:45 -0700
| Newsgroups | dev.linux.lists.spacemit,org.infradead.lists.linux-riscv,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
> > > 2. kmalloc() bounce buffer allocation failure on non-coherent systems=
:
> > > For non-coherent hardware, a bounce buffer is still mandatory for
> > > cache-line-aligned kmalloc(), even if 32-bit DMA bouncing is skipped.
>
> I'm not sure I'm parsing this correctly. Shouldn't this read "for
> *non*-cache-aligned kmalloc()" ? Or am I missing the point?
You are right; this should refer to kmalloc() buffers whose
size is not cache-line-aligned. dma_kmalloc_needs_bounce() requests
bouncing only when dma_kmalloc_size_aligned(size) is false for a
non-coherent device and a direction other than DMA_TO_DEVICE. I will
correct both the commit message and the corresponding code comment in the
next revision.
- Troy