Re: [PATCH RFC 5/7] irqchip/aclint-sswi: Add generic riscv,aclint-sswi match

On Wed, Jul 29, 2026 at 12:36:31AM +0800, Junhui Liu wrote:
> Add match entry for the generic "riscv,aclint-sswi" compatible string.
> This allows future SoCs with standard ACLINT SSWI implementations to
> directly reuse the driver via the generic fallback compatible (at least
> until hardware-specific quirks are identified).
> 
> Signed-off-by: Junhui Liu <[email protected]>
> ---
>  drivers/irqchip/irq-aclint-sswi.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/irqchip/irq-aclint-sswi.c b/drivers/irqchip/irq-aclint-sswi.c
> index ca06efd86fa1..2bd40c3ea288 100644
> --- a/drivers/irqchip/irq-aclint-sswi.c
> +++ b/drivers/irqchip/irq-aclint-sswi.c
> @@ -179,6 +179,7 @@ static int __init generic_aclint_sswi_early_probe(struct device_node *node,
>  }
>  IRQCHIP_DECLARE(mips_p8700_sswi, "mips,p8700-aclint-sswi", generic_aclint_sswi_early_probe);
>  IRQCHIP_DECLARE(nuclei_ux900_sswi, "nuclei,ux900-aclint-sswi", generic_aclint_sswi_early_probe);
> +IRQCHIP_DECLARE(riscv_sswi, "riscv,aclint-sswi", generic_aclint_sswi_early_probe);
>  

Again, use vendor specific name for irqchip declaration.

>  /* THEAD variant */
>  #define THEAD_C9XX_CSR_SXSTATUS			0x5c0
> 
> -- 
> 2.55.0
> 

Reagrds,
Inochi