Re: [PATCH 3/3] riscv: dts: spacemit: k3: add i2s0-i2s5 nodes

Hi Troy,
On 19:35 Tue 21 Jul     , Troy Mitchell wrote:
> Add the six SSPA-based I2S controller nodes for the K3 SoC.
> 
> i2s0 and i2s2-i2s5 each have a dedicated per-controller sysclk
> divider, so they use the published 7-clock layout (sysclk, bclk, bus,
> func, sysclk_div, c_sysclk, c_bclk).
> 
> i2s1 uses 6 clocks (sysclk, bclk, bus, func, c_sysclk, c_bclk) because
> its sysclk is driven directly by a DDN (ISCCR0) and has no separate
> divider stage.
> 
> Signed-off-by: Troy Mitchell <[email protected]>

Reviewed-by: Yixun Lan <[email protected]>
> ---
>  arch/riscv/boot/dts/spacemit/k3.dtsi | 119 +++++++++++++++++++++++++++++++++++
>  1 file changed, 119 insertions(+)
> 

-- 
Yixun Lan (dlan)