[SPDK] Re: Bad Sectors / expected 'error' responses & timing

Thank you to all!
I appreciate the direct pointers to the SPDK API where I can look at errors.

And Ben, thank you! That partially my understanding, but the PI of the project kept me in doubt. So I'm going to review everything again and push forward.

Thank you again... if we do take the SPDK route, I'll come back an post the relevant implementations in case it can help others.

Cheers,

Alvar

PS, I'll likely post this in a different thread if our initial tests don't work out - but we are trying to implement all this in a Xilinx Zynq 7x030 with an ARM core, and right now we're trying to figure out the need for coherent hardware cache. SPDK has been implemented for the Xilinx Ultrascale+ but not the 7000 series, and they have different cache systems! So more fun ;-P