[PATCH v5 22/35] x86/cacheinfo: Use parsed CPUID(0x2)
"Ahmed S. Darwish" <[email protected]> Fri, 5 Sep 2025 14:15:02 +0200
| Newsgroups | dev.linux.lists.x86-cpuid,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Use parsed CPUID(0x2) access instead of direct CPUID queries. Remove the max standard CPUID level check since the NULL check of cpuid_leaf_raw()'s result is equivalent. Signed-off-by: Ahmed S. Darwish <[email protected]> --- arch/x86/kernel/cpu/cacheinfo.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c index 51a95b07831f..4c3a08593ec4 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -391,14 +391,14 @@ static void intel_cacheinfo_0x2(struct cpuinfo_x86 *c) { unsigned int l1i = 0, l1d = 0, l2 = 0, l3 = 0; const struct leaf_0x2_table *desc; - union leaf_0x2_regs regs; + const struct cpuid_regs *regs; u8 *ptr; - if (c->cpuid_level < 2) + regs = cpuid_leaf_raw(c, 0x2); + if (!regs) return; - cpuid_leaf_0x2(®s); - for_each_cpuid_0x2_desc(regs, ptr, desc) { + for_each_parsed_cpuid_0x2_desc(regs, ptr, desc) { switch (desc->c_type) { case CACHE_L1_INST: l1i += desc->c_size; break; case CACHE_L1_DATA: l1d += desc->c_size; break; -- 2.50.1