[PATCH dovetail v8 04/11] irqchip/irq-riscv-aplic-msi: enable pipelined interrupt control
Tobias Schaffner <[email protected]>
| Newsgroups | dev.linux.lists.xenomai |
|---|---|
| Message-ID | <[email protected]> |
Signed-off-by: Tobias Schaffner <[email protected]> --- drivers/irqchip/irq-riscv-aplic-msi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c index fb8d1838609f..25de8929ea37 100644 --- a/drivers/irqchip/irq-riscv-aplic-msi.c +++ b/drivers/irqchip/irq-riscv-aplic-msi.c @@ -156,7 +156,8 @@ static const struct msi_domain_template aplic_msi_template = { .irq_write_msi_msg = aplic_msi_write_msg, .flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE | - IRQCHIP_MASK_ON_SUSPEND, + IRQCHIP_MASK_ON_SUSPEND | + IRQCHIP_PIPELINE_SAFE, }, .ops = { -- 2.43.0