[PATCH dovetail v8 07/11] irqchip/irq-sifive-plic: enable pipelined interrupt control
Tobias Schaffner <[email protected]>
| Newsgroups | dev.linux.lists.xenomai |
|---|---|
| Message-ID | <[email protected]> |
Signed-off-by: Tobias Schaffner <[email protected]> --- drivers/irqchip/irq-sifive-plic.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 5b0dac104814..e9ea0c86366e 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -88,7 +88,7 @@ struct plic_handler { * Protect mask operations on the registers given that we can't * assume atomic memory operations work on them. */ - raw_spinlock_t enable_lock; + hard_spinlock_t enable_lock; void __iomem *enable_base; u32 *enable_save; struct plic_priv *priv; @@ -227,7 +227,8 @@ static struct irq_chip plic_edge_chip = { #endif .irq_set_type = plic_irq_set_type, .flags = IRQCHIP_SKIP_SET_WAKE | - IRQCHIP_AFFINITY_PRE_STARTUP, + IRQCHIP_AFFINITY_PRE_STARTUP | + IRQCHIP_PIPELINE_SAFE, }; static struct irq_chip plic_chip = { @@ -242,7 +243,8 @@ static struct irq_chip plic_chip = { #endif .irq_set_type = plic_irq_set_type, .flags = IRQCHIP_SKIP_SET_WAKE | - IRQCHIP_AFFINITY_PRE_STARTUP, + IRQCHIP_AFFINITY_PRE_STARTUP | + IRQCHIP_PIPELINE_SAFE, }; static int plic_irq_set_type(struct irq_data *d, unsigned int type) @@ -444,7 +446,7 @@ static irq_hw_number_t cp100_get_hwirq(struct plic_handler *handler, void __iome u32 iso_mask; int i; - guard(raw_spinlock)(&handler->enable_lock); + guard(hard_spinlock)(&handler->enable_lock); /* Existing enable state is already cached in enable_save */ iso_mask = cp100_isolate_pending_irq(nr_irq_groups, handler); -- 2.43.0