[PATCH 6.12.y-cip 00/39] Add RZ/G3L SMARC EVK support
Biju <[email protected]>
| Newsgroups | org.cip-project.lists.cip-dev |
|---|---|
| Message-ID | <[email protected]> |
From: Biju Das <[email protected]> This patch series add minimal boot support for RZ/G3L SMARC EVK. All patches in this series are cherry-picked from mainline. Biju Das (31): dt-bindings: serial: renesas,scif: Document RZ/G3L SoC dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L SoC dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L RMII{tx,rx} clocks net: stmmac: dwmac-renesas-gbeth: Add support for RZ/G3L SoC dt-bindings: soc: renesas: Document RZ/G3L SoC variants, SMARC SoM and Carrier-II EVK dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3L SoC soc: renesas: rz-sysc: Add SoC identification for RZ/G3L SoC clk: renesas: rzg2l: Deassert reset on assert timeout clk: renesas: rzg2l: Add support for critical resets clk: renesas: rzg2l: Add helper for mod clock enable/disable clk: renesas: rzg2l: Add rzg2l_mod_clock_init_mstop_helper() clk: renesas: rzg2l: Re-enable critical module clocks during resume dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3L SoC clk: renesas: Add support for RZ/G3L SoC clk: renesas: rzg2l: Drop always-false check in rzg3s_cpg_pll_clk_recalc_rate() clk: renesas: rzg2l: Add support for enabling PLLs clk: renesas: r8a08g046: Add support for PLL6 clk: renesas: r9a08g046: Add GBETH clocks and resets clk: renesas: r9a08g046: Add GPIO clocks/resets clk: renesas: r9a08g046: Add CA55 core clocks clk: renesas: r9a08g046: Add WDT clocks and reset clk: renesas: r9a08g046: Add SCIF{1..5} clocks and resets clk: renesas: r9a08g046: Add I2C clocks and resets clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks arm64: dts: renesas: Add initial DTSI for RZ/G3L SoC arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM arm64: dts: renesas: renesas-smarc2: Move usb3 nodes to board DTS arm64: dts: renesas: Add initial device tree for RZ/G3L SMARC EVK board arm64: dts: renesas: r9a08g046: Add GBETH nodes arm64: dts: renesas: rzg3l-smarc-som: Enable eth0 (GBETH0) interface arm64: dts: renesas: r9a08g046: Add OPP table Geert Uytterhoeven (4): clk: renesas: rzg2l: Remove unneeded nullify checks clk: renesas: rzg2l: Rename mstp_clock to mod_clock clk: renesas: rzg2l: Consolidate DEF_MUX() and DEF_MUX_FLAGS() clk: renesas: rzg2l: Refactor rzg3l_cpg_pll_clk_endisable() Inochi Amaoto (2): net: stmmac: platform: Group GMAC4 compatible check net: stmmac: platform: Add snps,dwmac-5.30a IP compatible string Tommaso Merciai (2): clk: renesas: rzg2l: Simplify rzg2l_cpg_assert() and rzg2l_cpg_deassert() clk: renesas: rzg2l: Re-assert reset on deassert timeout .../bindings/clock/renesas,rzg2l-cpg.yaml | 40 +- .../bindings/net/renesas,rzv2h-gbeth.yaml | 81 ++- .../devicetree/bindings/net/snps,dwmac.yaml | 6 + .../bindings/serial/renesas,scif.yaml | 1 + .../soc/renesas/renesas,rzg2l-sysc.yaml | 1 + .../bindings/soc/renesas/renesas.yaml | 13 + arch/arm64/boot/dts/renesas/Makefile | 2 + arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 497 ++++++++++++++++++ .../boot/dts/renesas/r9a08g046l48-smarc.dts | 37 ++ arch/arm64/boot/dts/renesas/r9a08g046l48.dtsi | 13 + .../boot/dts/renesas/r9a09g047e57-smarc.dts | 6 + .../boot/dts/renesas/renesas-smarc2.dtsi | 8 - .../boot/dts/renesas/rzg3l-smarc-som.dtsi | 54 ++ drivers/clk/renesas/Kconfig | 7 +- drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/r9a08g046-cpg.c | 371 +++++++++++++ drivers/clk/renesas/rzg2l-cpg.c | 258 ++++++--- drivers/clk/renesas/rzg2l-cpg.h | 19 +- .../stmicro/stmmac/dwmac-renesas-gbeth.c | 1 + .../ethernet/stmicro/stmmac/stmmac_platform.c | 17 +- drivers/soc/renesas/Kconfig | 12 + drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/r9a08g046-sysc.c | 91 ++++ drivers/soc/renesas/rz-sysc.c | 3 + drivers/soc/renesas/rz-sysc.h | 1 + .../dt-bindings/clock/renesas,r9a08g046-cpg.h | 342 ++++++++++++ 26 files changed, 1777 insertions(+), 106 deletions(-) create mode 100644 arch/arm64/boot/dts/renesas/r9a08g046.dtsi create mode 100644 arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts create mode 100644 arch/arm64/boot/dts/renesas/r9a08g046l48.dtsi create mode 100644 arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi create mode 100644 drivers/clk/renesas/r9a08g046-cpg.c create mode 100644 drivers/soc/renesas/r9a08g046-sysc.c create mode 100644 include/dt-bindings/clock/renesas,r9a08g046-cpg.h -- 2.43.0