[PATCH 6.12.y-cip 00/23] Add support for RZ/G3L pincontrol

From: Biju Das <[email protected]>

This patch series aims to add pinctrl driver support for RZ/G3L SoC.

All the patches from this series are cherry-picked from mainline except
the patch for dropping "syscon" fallback compatible from sysc/sys
nodes from RZ/G3S, RZ/G3E, RZ/V2H and RZ/V2N to match with the
documentation after backporting the commit ba5095ebbc7a ("mfd: syscon:
Allow syscon nodes without a "syscon" compatible") to 6.12.y-cip.

This patch series has runtime dependency upon [1]
[1] https://lore.kernel.org/cip-dev/[email protected]/T/#t

Biju Das (16):
  dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document reset-names
  dt-bindings: pinctrl: renesas: Document RZ/G3L SoC
  pinctrl: renesas: rzg2l: Make QSPI register handling conditional
  pinctrl: renesas: rzg2l: Add support for selecting power source for
    {WDT,AWO,ISO}
  pinctrl: renesas: rzg2l: Update OEN pin validation to use exact match
  pinctrl: renesas: rzg2l: Add support for RZ/G3L SoC
  pinctrl: renesas: rzg2l: Simplify rzg2l_pinctrl_set_mux()
  pinctrl: renesas: rzg2l: Add support for clone channel control
  arm64: dts: renesas: Add pinctrl reset-names for RZ/G2L and RZ/V2H
    family SoCs
  arm64: dts: renesas: Drop "syscon" fallback compatible from sysc/sys
    nodes
  arm64: dts: renesas: r9a08g046: Add ICU node
  arm64: dts: renesas: r9a08g046: Add pincontrol node
  arm64: dts: renesas: r9a08g046l48-smarc: Add SCIF0 pincontrol
  arm64: dts: renesas: rzg3l-smarc-som: Add pinctrl configuration for
    ETH0
  arm64: dts: renesas: rzg3l-smarc-som: Enable eth1 (GBETH1) interface
  arm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys

John Madieu (1):
  pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling

Lad Prabhakar (5):
  pinctrl: renesas: rzg2l: Fix SMT register cache handling
  pinctrl: renesas: rzg2l: Add SR register cache for PM suspend/resume
  pinctrl: renesas: rzg2l: Handle RZ/V2H(P) IOLH configuration in PM
    cache
  pinctrl: renesas: rzg2l: Add NOD register cache for PM suspend/resume
  pinctrl: renesas: rzg2l: Handle PUPD for RZ/V2H(P) dedicated pins in
    PM

Rob Herring (Arm) (1):
  mfd: syscon: Allow syscon nodes without a "syscon" compatible

 .../pinctrl/renesas,rzg2l-pinctrl.yaml        |  37 +-
 arch/arm64/boot/dts/renesas/r9a07g043.dtsi    |   1 +
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    |   1 +
 arch/arm64/boot/dts/renesas/r9a07g054.dtsi    |   1 +
 arch/arm64/boot/dts/renesas/r9a08g045.dtsi    |   3 +-
 arch/arm64/boot/dts/renesas/r9a08g046.dtsi    | 103 ++-
 .../boot/dts/renesas/r9a08g046l48-smarc.dts   |  39 +-
 arch/arm64/boot/dts/renesas/r9a09g047.dtsi    |   3 +-
 arch/arm64/boot/dts/renesas/r9a09g056.dtsi    |   3 +-
 arch/arm64/boot/dts/renesas/r9a09g057.dtsi    |   3 +-
 .../boot/dts/renesas/rzg3l-smarc-som.dtsi     | 110 +++
 drivers/mfd/syscon.c                          |  12 +-
 drivers/pinctrl/renesas/pinctrl-rzg2l.c       | 650 ++++++++++++++++--
 .../pinctrl/renesas,r9a08g046-pinctrl.h       |  38 +
 14 files changed, 932 insertions(+), 72 deletions(-)
 create mode 100644 include/dt-bindings/pinctrl/renesas,r9a08g046-pinctrl.h

-- 
2.43.0