RE: [PATCH 6.12.y-cip 00/26] Add RZ/G3L IA55 support

Biju Das <[email protected]> Thu, 9 Jul 2026 05:30:25 +0000
Newsgroups org.cip-project.lists.cip-dev
Message-ID <TY3PR01MB11346ACB656A21973831A248086FE2@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi Pavel,

> -----Original Message-----
> From: Pavel Machek <[email protected]>
> Sent: 08 July 2026 21:26
> Subject: Re: [PATCH 6.12.y-cip 00/26] Add RZ/G3L IA55 support
> 
> Hi!
> 
> > The IRQC block on the RZ/G3L SoC is almost identical to the one found
> > on the RZ/G2L SoC, with the following differences:
> >
> >  - The number of GPIO interrupts for TINT selection is 113 instead of 123.
> >  - The pin index and TINT selection index are not in the 1:1 map.
> >  - The number of external interrupts are 16 instead of 8, out of these
> >    8 external interrupts are shared with TINT.
> 
> >  .../renesas,rzg2l-irqc.yaml                   | 157 ++---
> >  drivers/irqchip/irq-renesas-rzg2l.c           | 627 ++++++++++++++----
> 
> This looks okay to me.
> 
> Reviewed-by: Pavel Machek <[email protected]>
> 
> However... this is unused for the moment, right? I don't see dts changes that would actually activate the
> support.

The NMI support in this series is a new feature for already existing RZ/G2L SoCs.

The later patch series[1] will make use of this driver for RZ/G3L GPIO and External IRQ interrupts.

[1]
https://lore.kernel.org/cip-dev/[email protected]/T/#t

Cheers,
Biju