RE: [cip-dev] [PATCH 6.12.y-cip 02/23] dt-bindings: pinctrl: renesas: Document RZ/G3L SoC

Hi Pavel, Nobuhiro-San,

> -----Original Message-----
> From: [email protected] <[email protected]>
> Sent: 16 July 2026 02:20
> To: [email protected]; biju.das.au <[email protected]>
> Cc: [email protected]; Biju Das <[email protected]>; Prabhakar Mahadev Lad
> <[email protected]>
> Subject: RE: [cip-dev] [PATCH 6.12.y-cip 02/23] dt-bindings: pinctrl: renesas: Document RZ/G3L SoC
> 
> Hi,
> 
> > -----Original Message-----
> > From: [email protected] <[email protected]> On
> > Behalf Of Pavel Machek via lists.cip-project.org
> > Sent: Wednesday, July 15, 2026 7:12 PM
> > To: Biju <[email protected]>
> > Cc: [email protected]; iwamatsu nobuhiro(岩松 信洋 □ＤＩＴＣ○
> > ＣＰＴ) <[email protected]>; Pavel Machek
> > <[email protected]>; Biju Das <[email protected]>; Lad
> > Prabhakar <[email protected]>
> > Subject: Re: [cip-dev] [PATCH 6.12.y-cip 02/23] dt-bindings: pinctrl: renesas:
> > Document RZ/G3L SoC
> >
> > Hi!
> >
> > There seems to be something wrong here:
> >
> > > Add documentation for the pin controller found on the Renesas RZ/G3L
> > > (R9A08G046) SoC. The RZ/G3L PFC is similar to the RZ/G3S SoC but has
> > > more pins.
> > ...
> > > Document renesas,clonech property for controlling clone channel
> > > control register located on SYSC IP block on RZ/G3L SoC.
> >
> > Ok, no mention of deleting constraints for *57.
> >
> > > +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.
> > > +++ yaml
> > > @@ -154,15 +165,10 @@ allOf:
> > >        properties:
> > >          compatible:
> > >            contains:
> > > -            const: renesas,r9a09g057-pinctrl
> > > +            const: renesas,r9a08g046-pinctrl
> > >      then:
> > > -      properties:
> > > -        resets:
> > > -          maxItems: 2
> > > -    else:
> > > -      properties:
> > > -        resets:
> > > -          minItems: 3
> > > +      required:
> > > +        - renesas,clonech
> > >
> > >    - if:
> > >        properties:
> >
> > But now we delete constraints for *57, and add constraints for *46.
> > That looks wrong?
> 
> This is a side effect by backporting.
> Depending on the order of commits, the contents of the commit log may not match those of the patch.

The issue is we applied a patch twice in 6.12.y-cip which created duplicate entries

Patch 1:

commit 64e2071b58f579b758c83ae3170f2eee5b46fb03
dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC

Patch 2:

commit fb73d663b31398aea8528fb231e660c4958b29ff
dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC

If we need a clean history we need to revert a patch or

Options:

1) Revert offending patch to remove duplicate entry and send new version

2) Update the change log while applying.

Please let me know how you want to proceed.

Cheers,
Biju