RE: [cip-dev] [PATCH 6.12.y-cip 15/23] pinctrl: renesas: rzg2l: Add support for clone channel control
Biju Das <[email protected]> Fri, 24 Jul 2026 10:59:13 +0000
| Newsgroups | org.cip-project.lists.cip-dev |
|---|---|
| Message-ID | <TYCPR01MB11332696CD6BBD5417BC4EC0786CF2@TYCPR01MB11332.jpnprd01.prod.outlook.com> |
Hi Pavel, Thanks for the feedback. > -----Original Message----- > From: [email protected] <[email protected]> On Be= half Of Pavel Machek via > lists.cip-project.org > Sent: 15 July 2026 11:23 > Subject: Re: [cip-dev] [PATCH 6.12.y-cip 15/23] pinctrl: renesas: rzg2l: = Add support for clone channel > control >=20 > Hi! > > The RZ/G3L SoC has some IP such as I2C ch{2,3},SCIF ch{3,4,5}, RSPI > > ch{1,2} and RSCI ch{1,2,3} need to control the clone channel for > > proper operation. As per the RZ/G3L hardware manual, the clone channel > > setting is to be done before the mux setting. > > > > Signed-off-by: Biju Das <[email protected]> > > Reviewed-by: Geert Uytterhoeven <[email protected]> > > Link: > > https://patch.msgid.link/[email protected] > > .com > > Signed-off-by: Geert Uytterhoeven <[email protected]> > > Signed-off-by: Biju Das <[email protected]> >=20 > ... >=20 > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > @@ -352,6 +368,7 @@ struct rzg2l_pinctrl_pin_settings { > > * @smt: SMT registers cache > > * @sr: SR registers cache > > * @nod: NOD registers cache > > + * @clone: Clone register cache > > * @sd_ch: SD_CH registers cache >=20 > I notice clone is very different from the other fields (being value, not = pointer), yet is documented in > exactly the same way as other field. That should probably be improved. I agree this to be fixed in mainline with "Clone register value". Cheers, Biju >=20 > > * @eth_poc: ET_POC registers cache > > * @other_poc: OTHER_POC register cache @@ -369,6 +386,7 @@ struct > > rzg2l_pinctrl_reg_cache { > > u32 *smt[2]; > > u32 *sr[2]; > > u32 *nod[2]; > > + u32 clone; > > u8 sd_ch[2]; > > u8 eth_poc[2]; > > u8 oen; > > @@ -387,6 +405,8 @@ struct rzg2l_pinctrl { > > > > struct clk *clk; > > > > + struct regmap *syscon; > > + > > struct gpio_chip gpio_chip; > > struct pinctrl_gpio_range gpio_range; > > DECLARE_BITMAP(tint_slot, RZG2L_TINT_MAX_INTERRUPT); >=20 > Best regards, > Pavel