Re: [PATCH 6.12.y-cip v2 01/17] reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY

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Hi!

> From: Claudiu Beznea <[email protected]>
>=20
> commit 78f2d64e484753bfede6a0e9eab0ef35830c34fb upstream.
>=20
> On the Renesas RZ/G3S SoC, the USB PHY block has an input signal called
> PWRRDY. This signal is managed by the system controller and must be
> de-asserted after powering on the area where USB PHY resides and asserted
> before powering it off.

> +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c
> =20
> +static void rzg2l_usbphy_ctrl_set_pwrrdy(struct regmap_field *pwrrdy,
> +					 bool power_on)
> +{
> +	u32 val =3D power_on ? 0 : 1;

This probably should be !power_on... for readability.

> +	/* The initialization path guarantees that the mask is 1 bit long. */
> +	regmap_field_update_bits(pwrrdy, 1, val);
> +}

Best regards,
									Pavel

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