RE: [PATCH] common/mlx5: fix high SMMU TLB miss with mempool alignment

Hi,

Why does cross-NUMA pinning cause the huge page size alignment?
It seems we have a bug in the current code (and the patch fixes it somehow ) -
the loop  "/* Check that all ranges are on pages of the same size. */"
does not depend on iteration variable "I" and always runs till the end.

The patch mostly looks good to me, there are just my 5 cents to improve:

1.
>   	msl = rte_mem_virt2memseg_list((void *)ranges[0].start);
We could move this into the checking loop inside (prefertable). Or start the loop from i=1.
Just to have rte_mem_virt2memseg_list() call in single point.
>   	if (msl != NULL) {
> -		uint64_t hugepage_sz = 0;
> +		hugepage_sz = msl->page_sz;

2.
> +	if (same_hugepage_sz && hugepage_sz > 0) {
> +		unsigned int orig_ranges_n = ranges_n;
No sense to run this code if hugepage_sz is equal to rte_mem_page_size (),
all alignment and range merging is done by mlx5_mempool_get_chunks().

3. Also, I would be careful about external memory. All ranges are already
aligned to the correct page sizes, so let's add "if !is_extmem" checking.

With best regards,
Slava