Re: [PATCH 9/9] drm/amdgpu/gfx7: Enable IP block soft reset as a GPU recovery method

Tvrtko Ursulin <[email protected]>
Newsgroups org.freedesktop.lists.amd-gfx
Message-ID <[email protected]>
On 13/07/2026 13:58, Timur Kristóf wrote:
> Enable IP block soft reset as a GPU recovery method for GFX7
> graphics and compute rings.
> 
> This improves current user experience on all GFX7 chips:
> 
> * On Kaveri and Kabini there is currently no working
>    GPU recovery method so those chips currently require
>    the user to manually reset the computer when there
>    was a hang.
> 
> * On Hawaii and Bonaire, the current GPU recovery method
>    always clears the contents of VRAM, which means that
>    a buggy (hanging) app can crash the whole graphical
>    session, which is less than ideal.
> 
> Using GFX IP block soft reset means that we can now
> have a working recovery on GFX7 APUs and we can also
> move on from GFX hangs on dGPUs without crashing the
> whole system.
> 
> Tested with the "hard_reset_cp_wait" test case from the
> Hang Test Suite created by Natalie Vock and Konstantin Seurer.
> This Vulkan testcase waits for an event that never occurs,
> effectively a WAIT_REG_MEM packet that intentionally hangs.
> IP block soft reset can resolve that hang and allow
> the rest of the system to move on and keep functioning
> without needing a full ASIC reset.
> 
> Tested on the following chips:
> 
> Bonaire (Radeon HD 7790)
> Hawaii (Radeon R9 390X)
> Kaveri (A10-7850K)
> 
> Signed-off-by: Timur Kristóf <[email protected]>
> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 825e3d7d5f0f..1a7a6962303e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -4434,6 +4434,11 @@ static int gfx_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
>   	adev->gfx.compute_supported_reset =
>   		amdgpu_get_soft_full_reset_mask(&adev->gfx.compute_ring[0]);
>   
> +	if (!amdgpu_sriov_vf(adev) && !adev->debug_disable_ip_block_soft_reset) {
> +		adev->gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_IP_BLOCK_SOFT_RESET;
> +		adev->gfx.gfx_supported_reset |= AMDGPU_RESET_TYPE_IP_BLOCK_SOFT_RESET;
> +	}
> +
>   	return r;
>   }
>   

Reviewed-by: Tvrtko Ursulin <[email protected]>

Regards,

Tvrtko
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