Re: [PATCH 3/3] drm/amdgpu: fix JPEG v5.3.0 queue reset failure in DPG mode

Alex Deucher <[email protected]> Wed, 29 Jul 2026 10:01:46 -0400
Newsgroups org.freedesktop.lists.amd-gfx
Message-ID <CADnq5_O_KqeS=Uh9LdER2Esv6OeWHXM2GT0=-nOKG5U-v-n5Yw@mail.gmail.com>
Series is:
Acked-by: Alex Deucher <[email protected]>

On Wed, Jul 29, 2026 at 5:08 AM Jesse Zhang <[email protected]> wrote:
>
> Like jpeg_v5_0_0, in DPG mode the ring reset path only clears the
> JPEG_PG_MODE bit and never resets a hung JRBC, so the post-reset ring test
> times out and the driver falls back to a full MODE1 reset.
>
> Temporarily force the static power-gating path during the reset so the
> stop/start sequence power-cycles the JPEG block (JMI soft reset + power
> off/on), matching the jpeg_v4_0 reset.
>
> Signed-off-by: Jesse Zhang <[email protected]>
> ---
>  drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c | 21 +++++++++++++++++----
>  1 file changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
> index 68152b2ce015..c929d6f83bac 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c
> @@ -637,15 +637,28 @@ static int jpeg_v5_3_0_ring_reset(struct amdgpu_ring *ring,
>                                   unsigned int vmid,
>                                   struct amdgpu_fence *timedout_fence)
>  {
> +       struct amdgpu_device *adev = ring->adev;
> +       u32 pg_flags = adev->pg_flags;
>         int r;
>
>         amdgpu_ring_reset_helper_begin(ring, timedout_fence);
> -       r = jpeg_v5_3_0_stop(ring->adev);
> -       if (r)
> -               return r;
> -       r = jpeg_v5_3_0_start(ring->adev);
> +
> +       /*
> +        * The DPG stop path only clears the JPEG_PG_MODE bit and never resets a
> +        * hung JRBC, so the post-reset ring test times out and the driver falls
> +        * back to a full MODE1 reset. Temporarily force the static power-gating
> +        * path so the stop/start sequence actually power-cycles the JPEG block
> +        * (JMI soft reset + static power off/on), matching the working jpeg_v4_0
> +        * reset.
> +        */
> +       adev->pg_flags &= ~AMD_PG_SUPPORT_JPEG_DPG;
> +       r = jpeg_v5_3_0_stop(adev);
> +       if (!r)
> +               r = jpeg_v5_3_0_start(adev);
> +       adev->pg_flags = pg_flags;
>         if (r)
>                 return r;
> +
>         return amdgpu_ring_reset_helper_end(ring, timedout_fence);
>  }
>
> --
> 2.49.0
>