[PATCH 38/41] drm/amd/display: switch max FFE level cap based on FRL link rate
<[email protected]> Fri, 31 Jul 2026 17:12:59 -0400
| Newsgroups | org.freedesktop.lists.amd-gfx |
|---|---|
| Message-ID | <[email protected]> |
From: Relja Vojvodic <[email protected]> [How & Why] - Add support for dynamic FFE levels based on debug config and link rate Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Relja Vojvodic <[email protected]> Signed-off-by: Roman Li <[email protected]> --- .../gpu/drm/amd/display/dc/dio/dcn60/dcn60_dio_link_encoder.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn60/dcn60_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn60/dcn60_dio_link_encoder.c index 86ac881879cf..6fe15324ea50 100644 --- a/drivers/gpu/drm/amd/display/dc/dio/dcn60/dcn60_dio_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dio/dcn60/dcn60_dio_link_encoder.c @@ -139,7 +139,8 @@ void dpcs60_program_eq_setting( bool no_ffe, const struct dc_hdmi_frl_link_settings *link_settings) { - const uint8_t max_ffe_level = 0x7; + const uint8_t max_ffe_level = + (link_settings->frl_link_rate > HDMI_FRL_LINK_RATE_12GBPS) ? 0x7 : 0x3; struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); struct bp_transmitter_control cntl = { 0 }; -- 2.34.1