RE: [PATCH 1/2] drm/amdgpu: Remove separate guilty compute userq reset

AMD General

As for the hung userq, it should be identified by the MES reset API with th=
e hang_detect_only setting. However, it is unlikely to miss detecting the i=
nvalid opcode hang case, especially given that the userq invalid opcode IGT=
 test has not been implemented yet.

Hi @Liu, Shaoyun, are you aware of any known userq hang scenarios that cann=
ot be identified by MES API hang_detect_only? If not, could you please help=
 review the following patch, which unifies the userq reset path for hung qu=
eues?

Regards,
      Prike

> -----Original Message-----
> From: Liang, Prike
> Sent: Thursday, July 23, 2026 2:38 PM
> To: [email protected]; Zhang, Jesse(Jie) <[email protected]=
>
> Cc: Deucher, Alexander <[email protected]>; Koenig, Christian
> <[email protected]>
> Subject: RE: [PATCH 1/2] drm/amdgpu: Remove separate guilty compute userq
> reset
>
> I checked each different userq hang cases, and the guilty userq can be id=
entified by
> the MES firmware and report correctly.  @Zhang, Jesse(Jie) could you furt=
her check
> as well at you side?
>
> If there're some hang queues miss identified by MES firmware, then the co=
rrect thing
> is to further debug from MES firmware side rather than have such strange =
reset
> sequence and this reset workaround should be cleaned sooner or later.
>
>
> Regards,
>       Prike
>
> > -----Original Message-----
> > From: Liang, Prike <[email protected]>
> > Sent: Wednesday, July 15, 2026 2:31 PM
> > To: [email protected]
> > Cc: Deucher, Alexander <[email protected]>; Koenig, Christian
> > <[email protected]>; Liang, Prike <[email protected]>
> > Subject: [PATCH 1/2] drm/amdgpu: Remove separate guilty compute userq
> > reset
> >
> > amdgpu_mes_detect_and_reset_hung_queues() already detects the guilty
> > compute user queue and resets it through mes_userq_reset_queue(). The
> > additional reset via
> > mes_userq_reset() is unnecessary, so remove it to unify the compute use=
rq reset.
> >
> > Signed-off-by: Prike Liang <[email protected]>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c    | 5 -----
> >  drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 2 --
> >  2 files changed, 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > index 1e275c2e7dd3..4f2d5ff2f7be 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> > @@ -2315,11 +2315,6 @@ int amdgpu_gfx_reset_mes_compute(struct
> > amdgpu_device *adev,
> >             deferred_end[n_deferred].fence =3D guilty_fence;
> >             n_deferred++;
> >     }
> > -   if (uq) {
> > -           r =3D mes_userq_reset(uq);
> > -           if (r)
> > -                   goto out;
> > -   }
> >     for (i =3D 0; i < num_hung; i++) {
> >             struct amdgpu_ring *hr =3D NULL;
> >             struct amdgpu_fence *hf =3D NULL;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > index b6bfa3974839..fab21d4275f3 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
> > @@ -226,8 +226,6 @@ int mes_userq_reset_queue(struct amdgpu_device
> > *adev,
> >
> >     xa_for_each(&adev->userq_doorbell_xa, uq_id, uq) {
> >             if (uq->queue_type =3D=3D queue_type) {
> > -                   if (uq =3D=3D guilty_uq)
> > -                           continue;
> >                     if (uq->doorbell_index =3D=3D db) {
> >                             uq->state =3D AMDGPU_USERQ_STATE_HUNG;
> >                             if (use_mmio)
> > --
> > 2.34.1