[PATCH 12/34] drm/amd/display: fix HPD program filter programming
Tom Chung <[email protected]> Wed, 5 Aug 2026 14:36:24 +0800
| Newsgroups | org.freedesktop.lists.amd-gfx |
|---|---|
| Message-ID | <[email protected]> |
From: Charlene Liu <[email protected]> [why] fix a regression when moving logic from dal_hw_hpd_set_config to link_enc: Toggle_filter HW register programming is in wrong unit, which caused the connection time extreamly long. Reviewed-by: Ovidiu Bunea <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Signed-off-by: Tom Chung <[email protected]> --- .../gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c index fae49b3b170e..50174aded6aa 100644 --- a/drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_link_encoder.c @@ -58,8 +58,8 @@ bool dcn42_program_hpd_filter(struct link_encoder *enc, int delay_on_connect_in_ struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); HPD_REG_SET_2(DC_HPD_TOGGLE_FILT_CNTL, 0, - DC_HPD_CONNECT_INT_DELAY, delay_on_connect_in_ms, - DC_HPD_DISCONNECT_INT_DELAY, delay_on_disconnect_in_ms); + DC_HPD_CONNECT_INT_DELAY, delay_on_connect_in_ms / 10, + DC_HPD_DISCONNECT_INT_DELAY, delay_on_disconnect_in_ms / 10); return true; } -- 2.43.0