Re: [PATCH] drm/amdgpu: Enable GFXOFF functionality for SMU IP v15.0.5

On 06-08-2026 18:54, Shubhankar Milind Sardeshpande wrote:
> Add clockgating and powergating flags for GC 11.5.6
> and allow/disallow GFXOFF for SMU 15.0.5
>
> Signed-off-by: Shubhankar Milind Sardeshpande <[email protected]>
Reviewed-by: Pratik Vishwakarma <[email protected]>
> ---
>   drivers/gpu/drm/amd/amdgpu/soc21.c            | 21 +++++++++++++++++--
>   .../gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c    |  1 +
>   2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
> index 1f9a9c46377a..5a6c84c802f6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc21.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
> @@ -825,8 +825,25 @@ static int soc21_common_early_init(struct amdgpu_ip_block *ip_block)
>   		adev->external_rev_id = adev->rev_id + 0x1;
>                  break;
>   	case IP_VERSION(11, 5, 6):
> -		adev->cg_flags = 0;
> -		adev->pg_flags = 0;
> +		adev->cg_flags = AMD_CG_SUPPORT_GFX_CGCG |
> +			AMD_CG_SUPPORT_GFX_CGLS |
> +			AMD_CG_SUPPORT_GFX_MGCG |
> +			AMD_CG_SUPPORT_GFX_FGCG |
> +			AMD_CG_SUPPORT_REPEATER_FGCG |
> +			AMD_CG_SUPPORT_GFX_PERF_CLK |
> +			AMD_CG_SUPPORT_GFX_3D_CGCG |
> +			AMD_CG_SUPPORT_GFX_3D_CGLS |
> +			AMD_CG_SUPPORT_MC_MGCG |
> +			AMD_CG_SUPPORT_MC_LS |
> +			AMD_CG_SUPPORT_HDP_LS |
> +			AMD_CG_SUPPORT_HDP_DS |
> +			AMD_CG_SUPPORT_HDP_SD |
> +			AMD_CG_SUPPORT_ATHUB_MGCG |
> +			AMD_CG_SUPPORT_ATHUB_LS |
> +			AMD_CG_SUPPORT_IH_CG |
> +			AMD_CG_SUPPORT_BIF_MGCG |
> +			AMD_CG_SUPPORT_BIF_LS;
> +		adev->pg_flags = AMD_PG_SUPPORT_GFX_PG;
>   		adev->external_rev_id = adev->rev_id + 0xd0;
>   		break;
>   	case IP_VERSION(11, 7, 0):
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
> index 14d0eb296a00..4c0236196de4 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
> @@ -583,6 +583,7 @@ int smu_v15_0_gfx_off_control(struct smu_context *smu, bool enable)
>   
>   	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
>   	case IP_VERSION(15, 0, 0):
> +	case IP_VERSION(15, 0, 5):
>   	case IP_VERSION(15, 0, 9):
>   		if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
>   			return 0;