[PATCH] drm/amd/pm: Fix uninitialized mp1_fw_flags in smu_v15_0_load_microcode

smu_v15_0_load_microcode() polls the MP1 firmware flags register to wait
for firmware readiness, but only reads the register on APU devices; on
non-APU paths mp1_fw_flags was left uninitialized before the flag check.
Initialize it to zero to match the pattern already used in
smu_v15_0_check_fw_status().

Fixes: c7fc0f372374 ("drm/amd: Enable SMU 15_0_0 support")
Reported-by: Dan Carpenter <[email protected]>
Cc: Alex Deucher <[email protected]>
Cc: Christian König <[email protected]>
Signed-off-by: Srinivasan Shanmugam <[email protected]>
---
 drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
index 4c0236196de4..f1182305d707 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
@@ -114,7 +114,7 @@ int smu_v15_0_load_microcode(struct smu_context *smu)
 	uint32_t addr_start = MP1_SRAM;
 	uint32_t i;
 	uint32_t smc_fw_size;
-	uint32_t mp1_fw_flags;
+	u32 mp1_fw_flags = 0;
 
 	hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;
 	src = (const uint32_t *)(adev->pm.fw->data +
-- 
2.34.1