Re: [PATCH] drm/amd/pm: Remove unused functions in smu_v15_0

On 10-Aug-26 10:12 AM, Srinivasan Shanmugam wrote:
> smu_v15_0_load_microcode() and smu_v15_0_set_single_dpm_table() are not
> called anywhere; the latter is a carry-over from a previous version. The
> static helpers smu_v15_0_get_dpm_freq_by_index(),
> smu_v15_0_get_dpm_level_count() and smu_v15_0_get_fine_grained_status()
> were only called from smu_v15_0_set_single_dpm_table(), so remove those
> as well. Remove all functions along with their declarations from the
> header.
> 
> Fixes: c7fc0f372374 ("drm/amd: Enable SMU 15_0_0 support")
> Fixes: f7bee962d92a ("drm/amd/pm: Update dpm table structs for smu_v15_0")

Not a bug fix, they are just unused functions; so this doesn't sound 
accurate.

> Reported-by: Dan Carpenter <[email protected]>
> Suggested-by: Lijo Lazar <[email protected]>
> Cc: Alex Deucher <[email protected]>
> Cc: Christian König <[email protected]>
> Cc: Asad Kamal <[email protected]>
> Signed-off-by: Srinivasan Shanmugam <[email protected]>

Reviewed-by: Lijo Lazar <[email protected]>

Thanks,
Lijo

> ---
>   drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h  |   6 -
>   .../gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c    | 166 ------------------
>   2 files changed, 172 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h
> index ec96dc775485..0c97bee2c4bb 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h
> @@ -113,8 +113,6 @@ int smu_v15_0_init_microcode(struct smu_context *smu);
>   
>   void smu_v15_0_fini_microcode(struct smu_context *smu);
>   
> -int smu_v15_0_load_microcode(struct smu_context *smu);
> -
>   int smu_v15_0_init_smc_tables(struct smu_context *smu);
>   
>   int smu_v15_0_fini_smc_tables(struct smu_context *smu);
> @@ -183,10 +181,6 @@ int smu_v15_0_set_performance_level(struct smu_context *smu,
>   int smu_v15_0_set_power_source(struct smu_context *smu,
>   			       enum smu_power_src_type power_src);
>   
> -int smu_v15_0_set_single_dpm_table(struct smu_context *smu,
> -				   enum smu_clk_type clk_type,
> -				   struct smu_dpm_table *single_dpm_table);
> -
>   int smu_v15_0_gfx_ulv_control(struct smu_context *smu,
>   			      bool enablement);
>   
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
> index 29f444aea73a..2269703869f9 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
> @@ -106,44 +106,6 @@ void smu_v15_0_fini_microcode(struct smu_context *smu)
>   	adev->pm.fw_version = 0;
>   }
>   
> -int smu_v15_0_load_microcode(struct smu_context *smu)
> -{
> -	struct amdgpu_device *adev = smu->adev;
> -	const uint32_t *src;
> -	const struct smc_firmware_header_v1_0 *hdr;
> -	uint32_t addr_start = MP1_SRAM;
> -	uint32_t i;
> -	uint32_t smc_fw_size;
> -	uint32_t mp1_fw_flags = 0;
> -
> -	hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;
> -	src = (const uint32_t *)(adev->pm.fw->data +
> -				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));
> -	smc_fw_size = hdr->header.ucode_size_bytes;
> -
> -	for (i = 1; i < smc_fw_size/4 - 1; i++) {
> -		WREG32_PCIE(addr_start, src[i]);
> -		addr_start += 4;
> -	}
> -
> -
> -	for (i = 0; i < adev->usec_timeout; i++) {
> -		if (smu->is_apu)
> -			mp1_fw_flags = RREG32_PCIE(MP1_Public |
> -						   (smnMP1_FIRMWARE_FLAGS & 0xffffffff));
> -
> -		if ((mp1_fw_flags & MP1_CRU1_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >>
> -		    MP1_CRU1_MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT)
> -			break;
> -		udelay(1);
> -	}
> -
> -	if (i == adev->usec_timeout)
> -		return -ETIME;
> -
> -	return 0;
> -}
> -
>   int smu_v15_0_init_pptable_microcode(struct smu_context *smu)
>   {
>   	struct amdgpu_device *adev = smu->adev;
> @@ -1161,134 +1123,6 @@ int smu_v15_0_set_power_source(struct smu_context *smu,
>   					       NULL);
>   }
>   
> -static int smu_v15_0_get_dpm_freq_by_index(struct smu_context *smu,
> -					   enum smu_clk_type clk_type,
> -					   uint16_t level,
> -					   uint32_t *value)
> -{
> -	int ret = 0, clk_id = 0;
> -	uint32_t param;
> -
> -	if (!value)
> -		return -EINVAL;
> -
> -	if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type))
> -		return 0;
> -
> -	clk_id = smu_cmn_to_asic_specific_index(smu,
> -						CMN2ASIC_MAPPING_CLK,
> -						clk_type);
> -	if (clk_id < 0)
> -		return clk_id;
> -
> -	param = (uint32_t)(((clk_id & 0xffff) << 16) | (level & 0xffff));
> -
> -	ret = smu_cmn_send_smc_msg_with_param(smu,
> -					      SMU_MSG_GetDpmFreqByIndex,
> -					      param,
> -					      value);
> -	if (ret)
> -		return ret;
> -
> -	*value = *value & 0x7fffffff;
> -
> -	return ret;
> -}
> -
> -static int smu_v15_0_get_dpm_level_count(struct smu_context *smu,
> -					 enum smu_clk_type clk_type,
> -					 uint32_t *value)
> -{
> -	int ret;
> -
> -	ret = smu_v15_0_get_dpm_freq_by_index(smu, clk_type, 0xff, value);
> -
> -	return ret;
> -}
> -
> -static int smu_v15_0_get_fine_grained_status(struct smu_context *smu,
> -					     enum smu_clk_type clk_type,
> -					     bool *is_fine_grained_dpm)
> -{
> -	int ret = 0, clk_id = 0;
> -	uint32_t param;
> -	uint32_t value;
> -
> -	if (!is_fine_grained_dpm)
> -		return -EINVAL;
> -
> -	if (!smu_cmn_clk_dpm_is_enabled(smu, clk_type))
> -		return 0;
> -
> -	clk_id = smu_cmn_to_asic_specific_index(smu,
> -						CMN2ASIC_MAPPING_CLK,
> -						clk_type);
> -	if (clk_id < 0)
> -		return clk_id;
> -
> -	param = (uint32_t)(((clk_id & 0xffff) << 16) | 0xff);
> -
> -	ret = smu_cmn_send_smc_msg_with_param(smu,
> -					      SMU_MSG_GetDpmFreqByIndex,
> -					      param,
> -					      &value);
> -	if (ret)
> -		return ret;
> -
> -	/*
> -	 * BIT31:  1 - Fine grained DPM, 0 - Dicrete DPM
> -	 * now, we un-support it
> -	 */
> -	*is_fine_grained_dpm = value & 0x80000000;
> -
> -	return 0;
> -}
> -
> -int smu_v15_0_set_single_dpm_table(struct smu_context *smu,
> -				   enum smu_clk_type clk_type,
> -				   struct smu_dpm_table *single_dpm_table)
> -{
> -	int ret = 0;
> -	uint32_t clk = 0;
> -	bool is_fine_grained = false;
> -	int i;
> -
> -	ret = smu_v15_0_get_dpm_level_count(smu,
> -					    clk_type,
> -					    &single_dpm_table->count);
> -	if (ret) {
> -		dev_err(smu->adev->dev, "[%s] failed to get dpm levels!\n", __func__);
> -		return ret;
> -	}
> -
> -	ret = smu_v15_0_get_fine_grained_status(smu,
> -						clk_type,
> -						&is_fine_grained);
> -	if (ret) {
> -		dev_err(smu->adev->dev, "[%s] failed to get fine grained status!\n", __func__);
> -		return ret;
> -	}
> -
> -	if (is_fine_grained)
> -		single_dpm_table->flags |= SMU_DPM_TABLE_FINE_GRAINED;
> -
> -	for (i = 0; i < single_dpm_table->count; i++) {
> -		ret = smu_v15_0_get_dpm_freq_by_index(smu,
> -						      clk_type,
> -						      i,
> -						      &clk);
> -		if (ret) {
> -			dev_err(smu->adev->dev, "[%s] failed to get dpm freq by index!\n", __func__);
> -			return ret;
> -		}
> -
> -		single_dpm_table->dpm_levels[i].value = clk;
> -		single_dpm_table->dpm_levels[i].enabled = true;
> -	}
> -
> -	return 0;
> -}
> -
>   int smu_v15_0_set_vcn_enable(struct smu_context *smu,
>   			      bool enable,
>   			      int inst)