RE: [PATCH v3 2/4] drm/edid: parse HDMI 2.1 gaming (ALLM/VRR) capabilities from HF-VSDB
"Deucher, Alexander" <[email protected]>
| Newsgroups | org.freedesktop.lists.amd-gfx,org.freedesktop.lists.dri-devel |
|---|---|
| Message-ID | <BN9PR12MB514669623C7D0FCB0C5ED2BFF7DD2@BN9PR12MB5146.namprd12.prod.outlook.com> |
Public > -----Original Message----- > From: Wentland, Harry <[email protected]> > Sent: Tuesday, August 11, 2026 1:36 PM > To: Zuo, Jerry <[email protected]>; [email protected]; > Maarten Lankhorst <[email protected]>; Maxime Ripard > <[email protected]>; Thomas Zimmermann <[email protected]>; > Deucher, Alexander <[email protected]> > Cc: [email protected]; Tomasz Pakuła > <[email protected]>; Bernhard Berger > <[email protected]> > Subject: Re: [PATCH v3 2/4] drm/edid: parse HDMI 2.1 gaming (ALLM/VRR) > capabilities from HF-VSDB > > On 2026-08-10 20:39, Fangzhi Zuo wrote: > > From: Tomasz Pakuła <[email protected]> > > > > Parse the HDMI 2.1 gaming-related capabilities advertised in the HDMI > > Forum VSDB (HF-VSDB) and expose them through struct drm_hdmi_info so > > drivers can consume them. > > > > Add struct drm_hdmi_vrr_cap describing the sink's VRR capabilities: > > Fast VActive (Quick Frame Transport), Negative M VRR, Cinema VRR, > > MDelta, and the VRRmin/VRRmax range, together with a "supported" flag > > derived from that range. Add the fapa_start_location and allm (Auto > > Low Latency Mode) flags to struct drm_hdmi_info. > > > > drm_parse_hdmi_gaming_info() reads byte 8 of the HF-VSDB for the > > FAPA/ALLM/FVA/CNMVRR/CinemaVRR/MDelta flags and bytes 9-10 for > > VRRmin/VRRmax. Per HDMI 2.1, VRR is considered supported when VRRmin > > is within 1-48 and VRRmax is either 0 (maximum based on the video > > mode) or > >> = 100. It is invoked from drm_parse_hdmi_forum_scds(), and the parsed > > values are logged for debugging. > > > > Signed-off-by: Tomasz Pakuła <[email protected]> > > Signed-off-by: Fangzhi Zuo <[email protected]> > > Tested-by: Bernhard Berger <[email protected]> > > Reviewed-by: Harry Wentland <[email protected]> > > Maarten, Maxime, Thomas, I'd like to merge this into amd-staging-drm-next > since other changes depend on it. Would you like me to push it to drm-misc- > next as well or wait for amd-staging-drm-next pull to get it? > > Alex, any objections to taking this directly via asdn? No objections from me. Alex > > Harry > > > --- > > drivers/gpu/drm/drm_edid.c | 42 > +++++++++++++++++++++++++++++++++ > > include/drm/drm_connector.h | 47 > +++++++++++++++++++++++++++++++++++++ > > 2 files changed, 89 insertions(+) > > > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > > index ae26618a9a57..d508ec633c9b 100644 > > --- a/drivers/gpu/drm/drm_edid.c > > +++ b/drivers/gpu/drm/drm_edid.c > > @@ -6182,6 +6182,33 @@ static void > drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector, > > hdmi->y420_dc_modes = dc_mask; > > } > > > > +static void drm_parse_hdmi_gaming_info(struct drm_hdmi_info *hdmi, > > +const u8 *db) { > > + struct drm_hdmi_vrr_cap *vrr = &hdmi->vrr_cap; > > + > > + if (cea_db_payload_len(db) < 8) > > + return; > > + > > + hdmi->fapa_start_location = db[8] & > DRM_EDID_FAPA_START_LOCATION; > > + hdmi->allm = db[8] & DRM_EDID_ALLM; > > + vrr->fva = db[8] & DRM_EDID_FVA; > > + vrr->cnmvrr = db[8] & DRM_EDID_CNMVRR; > > + vrr->cinema_vrr = db[8] & DRM_EDID_CINEMA_VRR; > > + vrr->mdelta = db[8] & DRM_EDID_MDELTA; > > + > > + if (cea_db_payload_len(db) < 9) > > + return; > > + > > + vrr->vrr_min = db[9] & DRM_EDID_VRR_MIN_MASK; > > + vrr->supported = (vrr->vrr_min > 0 && vrr->vrr_min <= 48); > > + > > + if (cea_db_payload_len(db) < 10) > > + return; > > + > > + vrr->vrr_max = (db[9] & DRM_EDID_VRR_MAX_UPPER_MASK) << 2 | > db[10]; > > + vrr->supported &= (vrr->vrr_max == 0 || vrr->vrr_max >= 100); } > > + > > static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc, > > const u8 *hf_scds) > > { > > @@ -6308,6 +6335,8 @@ static void drm_parse_hdmi_forum_scds(struct > > drm_connector *connector, > > > > drm_parse_ycbcr420_deep_color_info(connector, hf_scds); > > > > + drm_parse_hdmi_gaming_info(&connector->display_info.hdmi, > hf_scds); > > + > > if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11]) { > > drm_parse_dsc_info(hdmi_dsc, hf_scds); > > dsc_support = true; > > @@ -6317,6 +6346,19 @@ static void drm_parse_hdmi_forum_scds(struct > drm_connector *connector, > > "[CONNECTOR:%d:%s] HF-VSDB: max TMDS clock: %d KHz, > HDMI 2.1 support: %s, DSC 1.2 support: %s\n", > > connector->base.id, connector->name, > > max_tmds_clock, str_yes_no(max_frl_rate), > > str_yes_no(dsc_support)); > > + drm_dbg_kms(connector->dev, > > + "[CONNECTOR:%d:%s] FAPA in blanking: %s, ALLM support: > %s, Fast Vactive support: %s\n", > > + connector->base.id, connector->name, str_yes_no(hdmi- > >fapa_start_location), > > + str_yes_no(hdmi->allm), str_yes_no(hdmi->vrr_cap.fva)); > > + drm_dbg_kms(connector->dev, > > + "[CONNECTOR:%d:%s] Negative M VRR support: %s, > CinemaVRR support: %s, Mdelta: %d\n", > > + connector->base.id, connector->name, str_yes_no(hdmi- > >vrr_cap.cnmvrr), > > + str_yes_no(hdmi->vrr_cap.cinema_vrr), hdmi- > >vrr_cap.mdelta); > > + drm_dbg_kms(connector->dev, > > + "[CONNECTOR:%d:%s] VRRmin: %u, VRRmax: %u, VRR > supported: %s\n", > > + connector->base.id, connector->name, hdmi- > >vrr_cap.vrr_min, > > + hdmi->vrr_cap.vrr_max, str_yes_no(hdmi- > >vrr_cap.supported)); > > + > > } > > > > static void drm_parse_hdmi_deep_color_info(struct drm_connector > > *connector, diff --git a/include/drm/drm_connector.h > > b/include/drm/drm_connector.h index cd06a3b914a0..9f8f109c2dd1 > 100644 > > --- a/include/drm/drm_connector.h > > +++ b/include/drm/drm_connector.h > > @@ -254,6 +254,44 @@ struct drm_scdc { > > struct drm_scrambling scrambling; > > }; > > > > +/** > > + * struct drm_hdmi_vrr_cap - Information about VRR capabilities of a > > +HDMI sink > > + * > > + * Describes the VRR support provided by HDMI 2.1 sink. The > > +information is > > + * fetched fom additional HFVSDB blocks defined for HDMI 2.1. > > + */ > > +struct drm_hdmi_vrr_cap { > > + /** @fva: flag for Fast VActive (Quick Frame Transport) support */ > > + bool fva; > > + > > + /** @mcnmvrr: flag for Negative M VRR support */ > > + bool cnmvrr; > > + > > + /** @mcinema_vrr: flag for Cinema VRR support */ > > + bool cinema_vrr; > > + > > + /** @mdelta: flag for limited frame-to-frame compensation support > */ > > + bool mdelta; > > + > > + /** > > + * @vrr_min : minimum supported variable refresh rate in Hz. > > + * Valid values only inide 1 - 48 range > > + */ > > + u16 vrr_min; > > + > > + /** > > + * @vrr_max : maximum supported variable refresh rate in Hz > (optional). > > + * Valid values are either 0 (max based on video mode) or >= 100 > > + */ > > + u16 vrr_max; > > + > > + /** > > + * @supported: flag for vrr support based on checking for VRRmin and > > + * VRRmax values having correct values. > > + */ > > + bool supported; > > +}; > > + > > /** > > * struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink > > * > > @@ -330,6 +368,15 @@ struct drm_hdmi_info { > > /** @max_lanes: supported by sink */ > > u8 max_lanes; > > > > + /** @fapa_start_location: flag for the FAPA in blanking support */ > > + bool fapa_start_location; > > + > > + /** @allm: flag for Auto Low Latency Mode support by sink */ > > + bool allm; > > + > > + /** @vrr_cap: VRR capabilities of the sink */ > > + struct drm_hdmi_vrr_cap vrr_cap; > > + > > /** @dsc_cap: DSC capabilities of the sink */ > > struct drm_hdmi_dsc_cap dsc_cap; > > };