[PATCH 018/109] drm/amd/ras: Add mce ras error type

From: YiPeng Chai <[email protected]>

Add new ras error type so that ACA parser
can parse ras data from mce.

Signed-off-by: YiPeng Chai <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/ras/core/aca.c          | 9 +++++++--
 drivers/gpu/drm/amd/ras/core/core.c         | 2 ++
 drivers/gpu/drm/amd/ras/core/ras.h          | 1 +
 drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c | 6 ++++--
 4 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/ras/core/aca.c b/drivers/gpu/drm/amd/ras/core/aca.c
index 23660e93eecde..be4af1522685b 100644
--- a/drivers/gpu/drm/amd/ras/core/aca.c
+++ b/drivers/gpu/drm/amd/ras/core/aca.c
@@ -23,6 +23,7 @@
  */
 #include "ras.h"
 #include "aca.h"
+#include "ras_mce.h"
 #include "aca_v1_0.h"
 #include "ras_aca_v5_0.h"
 #include "ras_mp1_v13_0.h"
@@ -152,7 +153,9 @@ static void aca_log_bank_data(struct ras_core_context *ras_core,
 static int aca_get_bank_count(struct ras_core_context *ras_core,
 			      enum ras_err_type type, u32 *count)
 {
-	return ras_mp1_get_bank_count(ras_core, type, count);
+	return (type == RAS_ERR_TYPE__MCE) ?
+		ras_mce_get_bank_count(ras_core, type, count) :
+		ras_mp1_get_bank_count(ras_core, type, count);
 }
 
 static bool aca_match_bank(struct aca_block *aca_blk, struct aca_bank_reg *bank)
@@ -297,7 +300,9 @@ static int aca_dump_bank(struct ras_core_context *ras_core, u32 ecc_type,
 {
 	struct aca_bank_reg *bank = (struct aca_bank_reg *)data;
 
-	return ras_mp1_dump_bank(ras_core, ecc_type, idx,
+	return (ecc_type == RAS_ERR_TYPE__MCE) ?
+			ras_mce_dump_bank(ras_core, ecc_type, idx, bank) :
+			ras_mp1_dump_bank(ras_core, ecc_type, idx,
 				bank->regs, ARRAY_SIZE(bank->regs));
 }
 
diff --git a/drivers/gpu/drm/amd/ras/core/core.c b/drivers/gpu/drm/amd/ras/core/core.c
index 2ddb011e8082b..9d0453ba21c15 100644
--- a/drivers/gpu/drm/amd/ras/core/core.c
+++ b/drivers/gpu/drm/amd/ras/core/core.c
@@ -534,6 +534,8 @@ int ras_core_update_ecc_info(struct ras_core_context *ras_core)
 {
 	int ret;
 
+	ras_aca_update_ecc(ras_core, RAS_ERR_TYPE__MCE, NULL);
+
 	ret = ras_aca_update_ecc(ras_core, RAS_ERR_TYPE__CE, NULL);
 	if (!ret)
 		ret = ras_aca_update_ecc(ras_core, RAS_ERR_TYPE__UE, NULL);
diff --git a/drivers/gpu/drm/amd/ras/core/ras.h b/drivers/gpu/drm/amd/ras/core/ras.h
index 2fed47a476168..9bab956bbf385 100644
--- a/drivers/gpu/drm/amd/ras/core/ras.h
+++ b/drivers/gpu/drm/amd/ras/core/ras.h
@@ -98,6 +98,7 @@ enum ras_err_type {
 	RAS_ERR_TYPE__UE = 0,
 	RAS_ERR_TYPE__CE,
 	RAS_ERR_TYPE__DE,
+	RAS_ERR_TYPE__MCE,
 	RAS_ERR_TYPE__LAST
 };
 
diff --git a/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c b/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c
index e407c3eb1c967..15e72d4b492d0 100644
--- a/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c
+++ b/drivers/gpu/drm/amd/ras/core/ras_aca_v5_0.c
@@ -242,7 +242,8 @@ static int aca_parse_bank_default(struct ras_core_context *ras_core,
 	} else {
 		if (bank->ecc_type == RAS_ERR_TYPE__UE)
 			err->ue_count = 1;
-		else if (bank->ecc_type == RAS_ERR_TYPE__CE)
+		else if ((bank->ecc_type == RAS_ERR_TYPE__CE) ||
+			(bank->ecc_type == RAS_ERR_TYPE__MCE))
 			err->ce_count = ACA_V5_REG_MISC0_ERRCNT(misc0);
 	}
 
@@ -275,7 +276,8 @@ static int aca_parse_xgmi_bank(struct ras_core_context *ras_core,
 		if (ext_error_code != 0 && ext_error_code != 1 && ext_error_code != 9)
 			count = 0ULL;
 		err->ue_count = count;
-	} else if (bank->ecc_type == RAS_ERR_TYPE__CE) {
+	} else if ((bank->ecc_type == RAS_ERR_TYPE__CE) ||
+		(bank->ecc_type == RAS_ERR_TYPE__MCE)) {
 		count = ext_error_code == 6 ? count : 0ULL;
 		err->ce_count = count;
 	}
-- 
2.55.0