[PATCH 088/109] drm/amd/ras: add module parameter for uniras

From: YiPeng Chai <[email protected]>

Add module parameter for uniras.

Signed-off-by: YiPeng Chai <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c       |  6 +++-
 drivers/gpu/drm/amd/ras/core/core.c           | 20 +++++++++++-
 drivers/gpu/drm/amd/ras/core/ras.h            | 11 +++++++
 .../amd/ras/ras_mgr/amdgpu_ras_eeprom_i2c.c   | 27 +++++++++++-----
 .../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c  | 31 ++++++++++++++++---
 .../gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.h  |  3 +-
 6 files changed, 83 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 13297b6f062b6..4def1bf489c3b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -3570,6 +3570,7 @@ static void amdgpu_ras_init_reserved_vram_size(struct amdgpu_device *adev)
 int amdgpu_ras_init(struct amdgpu_device *adev)
 {
 	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
+	struct ras_module_param param = {0};
 	int r;
 
 	if (con)
@@ -3593,7 +3594,10 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
 
 	amdgpu_ras_check_supported(adev);
 
-	amdgpu_ras_mgr_sw_init(adev);
+	param.ras_feature_enable = amdgpu_ras_enable;
+	param.ras_feature_mask = amdgpu_ras_mask;
+	param.ras_bad_page_threshold = amdgpu_bad_page_threshold;
+	amdgpu_ras_mgr_sw_init(adev, &param);
 
 	if (!con->uniras_enabled &&
 	    (!adev->ras_enabled || adev->asic_type == CHIP_VEGA10)) {
diff --git a/drivers/gpu/drm/amd/ras/core/core.c b/drivers/gpu/drm/amd/ras/core/core.c
index 662a3a17a6b6a..e03f6889e1db5 100644
--- a/drivers/gpu/drm/amd/ras/core/core.c
+++ b/drivers/gpu/drm/amd/ras/core/core.c
@@ -783,14 +783,21 @@ int ras_core_get_eeprom_version(struct ras_core_context *ras_core,
 uint64_t ras_core_get_ras_caps(struct ras_core_context *ras_core)
 {
 	uint64_t ras_hw_caps,  ras_drv_caps;
+	struct ras_module_param param = {0};
 
 	if (!ras_core)
 		return 0;
 
+	if (ras_core_get_module_param(ras_core, &param))
+		return 0;
+
+	if (!param.ras_feature_enable)
+		return 0;
+
 	ras_hw_caps = ras_psp_get_hw_ras_caps(ras_core);
 	ras_drv_caps = ras_aca_get_parser_caps(ras_core);
 
-	return ras_hw_caps & ras_drv_caps;
+	return ras_hw_caps & ras_drv_caps & param.ras_feature_mask;
 }
 
 bool ras_core_poison_supported(struct ras_core_context *ras_core)
@@ -826,3 +833,14 @@ int ras_core_eeprom_early_init_service(struct ras_core_context *ras_core)
 
 	return ras_core_eeprom_recovery(ras_core);
 }
+
+int ras_core_get_module_param(struct ras_core_context *ras_core,
+		struct ras_module_param *param)
+{
+	if (!ras_core || !ras_core->config || !param)
+		return -EINVAL;
+
+	memcpy(param, &ras_core->config->mod_param, sizeof(*param));
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/amd/ras/core/ras.h b/drivers/gpu/drm/amd/ras/core/ras.h
index 238a587447ff4..6ae23a677f57b 100644
--- a/drivers/gpu/drm/amd/ras/core/ras.h
+++ b/drivers/gpu/drm/amd/ras/core/ras.h
@@ -350,6 +350,13 @@ struct ras_eeprom_config {
 	const struct ras_eeprom_sys_func *eeprom_sys_fn;
 };
 
+struct ras_module_param {
+	/* driver installation option parameter */
+	int ras_feature_enable;
+	u64 ras_feature_mask;
+	int ras_bad_page_threshold;
+};
+
 struct ras_core_config {
 	u32 aca_ip_version;
 	u32 umc_ip_version;
@@ -370,6 +377,8 @@ struct ras_core_config {
 	struct ras_psp_config psp_cfg;
 	struct ras_eeprom_config eeprom_cfg;
 	struct ras_umc_config umc_cfg;
+
+	struct ras_module_param mod_param;
 };
 
 struct ras_core_context {
@@ -478,4 +487,6 @@ bool ras_core_poison_supported(struct ras_core_context *ras_core);
 bool ras_core_in_early_init(struct ras_core_context *ras_core);
 bool ras_core_early_init_service_enabled(struct ras_core_context *ras_core);
 int ras_core_eeprom_early_init_service(struct ras_core_context *ras_core);
+int ras_core_get_module_param(struct ras_core_context *ras_core,
+		struct ras_module_param *param);
 #endif
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_eeprom_i2c.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_eeprom_i2c.c
index 14817de696a39..d2c9fc525af57 100644
--- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_eeprom_i2c.c
+++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_eeprom_i2c.c
@@ -81,9 +81,12 @@ static int ras_eeprom_i2c_config(struct ras_core_context *ras_core,
 		struct ras_eeprom_param_config *cfg)
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)ras_core->dev;
+	struct ras_module_param mod_param = {0};
 	u64 badpages, badpages_per_record = 0;
 	u8 i2c_addr;
 	u32 ip_version;
+	int badpage_threshold = 0;
+	int ret;
 
 	ip_version = amdgpu_ip_version(adev, MP1_HWIP, 0);
 
@@ -136,8 +139,16 @@ static int ras_eeprom_i2c_config(struct ras_core_context *ras_core,
 		}
 	}
 
+	ret = ras_core_get_module_param(ras_core, &mod_param);
+	if (ret) {
+		RAS_DEV_ERR(adev, "Failed to get module option parameter.\n");
+		return ret;
+	}
+
+	badpage_threshold = mod_param.ras_bad_page_threshold;
+
 	/*
-	 * amdgpu_bad_page_threshold is used to config
+	 * badpage_threshold is used to config
 	 * the threshold for the number of bad pages.
 	 * -1:  Threshold is set to default value
 	 *      Driver will issue a warning message when threshold is reached
@@ -152,21 +163,21 @@ static int ras_eeprom_i2c_config(struct ras_core_context *ras_core,
 	 *      A user-defined threshold is set
 	 *      Driver will halt runtime services when this custom threshold is reached.
 	 */
-	if (amdgpu_bad_page_threshold == NONSTOP_OVER_THRESHOLD) {
+	if (badpage_threshold == NONSTOP_OVER_THRESHOLD) {
 		cfg->work_mode_over_thresh = RAS_WORK_MODE_OVER_THRESH_NORMAL;
 		badpages = ESTIMATE_BAD_PAGE_THRESHOLD(adev->gmc.mc_vram_size);
-	} else if (amdgpu_bad_page_threshold == WARN_NONSTOP_OVER_THRESHOLD) {
+	} else if (badpage_threshold == WARN_NONSTOP_OVER_THRESHOLD) {
 		cfg->work_mode_over_thresh = RAS_WORK_MODE_OVER_THRESH_STRICT;
 		badpages = COUNT_BAD_PAGE_THRESHOLD(RAS_RESERVED_VRAM_SIZE_DEFAULT);
-	} else if (!amdgpu_bad_page_threshold) {
+	} else if (!badpage_threshold) {
 		cfg->work_mode_over_thresh = RAS_WORK_MODE_OVER_THRESH_DEBUG;
 		badpages = 128;
-	} else if (amdgpu_bad_page_threshold > 0) {
+	} else if (badpage_threshold > 0) {
 		cfg->work_mode_over_thresh = RAS_WORK_MODE_OVER_THRESH_RMA;
-		badpages = amdgpu_bad_page_threshold;
+		badpages = badpage_threshold;
 	} else {
-		RAS_DEV_ERR(adev, "Invalid amdgpu_bad_page_threshold value(%d)\n",
-			amdgpu_bad_page_threshold);
+		RAS_DEV_ERR(adev, "Invalid badpage_threshold value(%d)\n",
+			badpage_threshold);
 		return -EINVAL;
 	}
 
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
index ccfa213816da7..bda1f76d2dbf9 100644
--- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
+++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
@@ -81,6 +81,24 @@ static void amdgpu_ras_mgr_init_event_mgr(struct ras_core_context *ras_core)
 		amdgpu_put_xgmi_hive(hive);
 }
 
+static int amdgpu_ras_mgr_init_module_param(struct amdgpu_device *adev,
+		struct ras_core_config *config, struct ras_module_param *param)
+{
+	struct ras_module_param *mod_param = &config->mod_param;
+
+	if (param) {
+		mod_param->ras_feature_enable = param->ras_feature_enable;
+		mod_param->ras_feature_mask = param->ras_feature_mask;
+		mod_param->ras_bad_page_threshold = param->ras_bad_page_threshold;
+	} else {
+		mod_param->ras_feature_enable = -1;
+		mod_param->ras_feature_mask = U64_MAX;
+		mod_param->ras_bad_page_threshold = -1;
+	}
+
+	return 0;
+}
+
 static int amdgpu_ras_mgr_init_aca_config(struct amdgpu_device *adev,
 		struct ras_core_config *config)
 {
@@ -250,7 +268,8 @@ static int amdgpu_ras_mgr_init_umc_config(struct amdgpu_device *adev,
 	return 0;
 }
 
-static struct ras_core_context *amdgpu_ras_mgr_create_ras_core(struct amdgpu_device *adev)
+static struct ras_core_context *amdgpu_ras_mgr_create_ras_core(struct amdgpu_device *adev,
+			struct ras_module_param *param)
 {
 	struct ras_core_config init_config;
 
@@ -278,6 +297,7 @@ static struct ras_core_context *amdgpu_ras_mgr_create_ras_core(struct amdgpu_dev
 		amdgpu_ras_is_poison_mode_supported(adev);
 	init_config.ras_debug_mask = amdgpu_debug_mask;
 
+	amdgpu_ras_mgr_init_module_param(adev, &init_config, param);
 	amdgpu_ras_mgr_init_aca_config(adev, &init_config);
 	amdgpu_ras_mgr_init_eeprom_config(adev, &init_config);
 	amdgpu_ras_mgr_init_mp1_config(adev, &init_config);
@@ -288,7 +308,7 @@ static struct ras_core_context *amdgpu_ras_mgr_create_ras_core(struct amdgpu_dev
 	return ras_core_create(&init_config);
 }
 
-int amdgpu_ras_mgr_sw_init(struct amdgpu_device *adev)
+int amdgpu_ras_mgr_sw_init(struct amdgpu_device *adev, struct ras_module_param *param)
 {
 	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
 	struct amdgpu_ras_mgr *ras_mgr;
@@ -300,7 +320,10 @@ int amdgpu_ras_mgr_sw_init(struct amdgpu_device *adev)
 	/* Disabled by default */
 	con->uniras_enabled = false;
 
-	if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
+	/* Disable ras via driver installation option */
+	if (param && !param->ras_feature_enable)
+		return 0;
+	else if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14) ||
 	    amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||
 	    amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6))
 		con->uniras_enabled = true;
@@ -317,7 +340,7 @@ int amdgpu_ras_mgr_sw_init(struct amdgpu_device *adev)
 	con->ras_mgr = ras_mgr;
 	ras_mgr->adev = adev;
 
-	ras_mgr->ras_core = amdgpu_ras_mgr_create_ras_core(adev);
+	ras_mgr->ras_core = amdgpu_ras_mgr_create_ras_core(adev, param);
 	if (!ras_mgr->ras_core) {
 		RAS_DEV_ERR(adev, "Failed to create ras core!\n");
 		ret = -EINVAL;
diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.h b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.h
index 32416c9d6086e..442d628ccfece 100644
--- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.h
+++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.h
@@ -61,7 +61,8 @@ struct amdgpu_ras_mgr {
 
 extern const struct amdgpu_ip_block_version ras_v1_0_ip_block;
 
-int amdgpu_ras_mgr_sw_init(struct amdgpu_device *adev);
+int amdgpu_ras_mgr_sw_init(struct amdgpu_device *adev,
+		struct ras_module_param *param);
 int amdgpu_ras_mgr_sw_fini(struct amdgpu_device *adev);
 int amdgpu_ras_mgr_early_init_service(struct amdgpu_device *adev);
 struct amdgpu_ras_mgr *amdgpu_ras_mgr_get_context(
-- 
2.55.0