[PATCH 4/4] drm/i915/fbc: xe2_lpd+ no more surface size restrictions for FBC
Vinod Govindapillai <[email protected]>
| Newsgroups | org.freedesktop.lists.intel-gfx,org.freedesktop.lists.intel-xe |
|---|---|
| Organization | Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo |
| Message-ID | <[email protected]> |
From xe2_lpd+ platforms, enabling FBC do not depend on the surface size. So remove it. Bspec: 69560 Signed-off-by: Vinod Govindapillai <[email protected]> --- drivers/gpu/drm/i915/display/intel_fbc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 20f02ef9387a..df8446457247 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1306,6 +1306,9 @@ static bool intel_fbc_surface_size_ok(const struct intel_plane_state *plane_stat struct intel_display *display = to_intel_display(plane_state); unsigned int effective_w, effective_h, max_w, max_h; + if (DISPLAY_VER(display) >= 20) + return true; + intel_fbc_max_surface_size(display, &max_w, &max_h); effective_w = plane_state->view.color_plane[0].x + -- 2.43.0