[PATCH v5 2/9] drm/i915/vrr: Restrict CMRR enable condition to VRR-TG-default platforms

CMRR is reported as supported from DISPLAY_VER >= 20 (HAS_CMRR), but it
is built on top of the VRR timing generator running as the default
timing generator, for now this only happens from DISPLAY_VER >= 30.
Gate the CMRR enable condition (and its readout) on both,
so CMRR is only ever enabled on platforms where the VRR timing
generator is the default.

This is a preparation patch for the upcoming CMRR enable sequence: CMRR
remains disabled for now (the "avoid CMRR" short-circuit above is kept),
and this only refines the condition so that when the enable sequence
lands, CMRR is correctly restricted to VRR-TG-default platforms. This is
in line with the comment above, which keeps CMRR disabled until VRR with
fixed timings is working.

No functional change.

Signed-off-by: Mitul Golani <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 51e4f3309b8b..d3cad81bba89 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -195,7 +195,7 @@ is_cmrr_frac_required(struct intel_crtc_state *crtc_state)
 	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 
 	/* Avoid CMRR for now till we have VRR with fixed timings working */
-	if (!HAS_CMRR(display) || true)
+	if (!(HAS_CMRR(display) && intel_vrr_always_use_vrr_tg(display)) || true)
 		return false;
 
 	actual_refresh_k =
@@ -1066,7 +1066,7 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
 	trans_vrr_ctl = intel_de_read(display,
 				      TRANS_VRR_CTL(display, cpu_transcoder));
 
-	if (HAS_CMRR(display))
+	if (HAS_CMRR(display) && intel_vrr_always_use_vrr_tg(display))
 		crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE);
 
 	if (crtc_state->cmrr.enable) {
-- 
2.48.1