Re: [PATCH v2 2/3] drm/i915/fbc: No need of any hardcoded plane width limit from LNL+

"Hogander, Jouni" <[email protected]> Thu, 23 Jul 2026 08:20:47 +0000
Newsgroups org.freedesktop.lists.intel-gfx,org.freedesktop.lists.intel-xe
Message-ID <[email protected]>
On Wed, 2026-07-22 at 16:24 +0300, Vinod Govindapillai wrote:
> In xe2_lpd+ platforms, there are no restrictions to enable FBC
> on planes with respect to the plane width - width can be as per
> the platform's maximum supported resolution.
> 
> v2: patches squashed and changes in patch descriptions
> 
> Bspec: 69560
> Signed-off-by: Vinod Govindapillai <[email protected]>

Reviewed-by: Jouni Högander <[email protected]>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a7d02dd6ca96..20f02ef9387a 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -59,6 +59,7 @@
>  #include "intel_fbc_regs.h"
>  #include "intel_frontbuffer.h"
>  #include "intel_parent.h"
> +#include "skl_universal_plane.h"
>  
>  #define for_each_fbc_id(__display, __fbc_id) \
>  	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS;
> (__fbc_id)++) \
> @@ -1315,10 +1316,18 @@ static bool intel_fbc_surface_size_ok(const
> struct intel_plane_state *plane_stat
>  	return effective_w <= max_w && effective_h <= max_h;
>  }
>  
> -static void intel_fbc_max_plane_size(struct intel_display *display,
> +static void intel_fbc_max_plane_size(const struct intel_plane_state
> *plane_state,
>  				     unsigned int *w, unsigned int
> *h)
>  {
> -	if (DISPLAY_VER(display) >= 10) {
> +	struct intel_display *display =
> to_intel_display(plane_state);
> +	struct intel_plane *plane = to_intel_plane(plane_state-
> >uapi.plane);
> +	const struct drm_framebuffer *fb = plane_state->hw.fb;
> +	unsigned int rotation = plane_state->hw.rotation;
> +
> +	if (DISPLAY_VER(display) >= 20) {
> +		*w = intel_plane_max_width(plane, fb, 0, rotation);
> +		*h = 4096;
> +	} else if (DISPLAY_VER(display) >= 10) {
>  		*w = 5120;
>  		*h = 4096;
>  	} else if (DISPLAY_VER(display) >= 8 || display-
> >platform.haswell) {
> @@ -1335,10 +1344,9 @@ static void intel_fbc_max_plane_size(struct
> intel_display *display,
>  
>  static bool intel_fbc_plane_size_valid(const struct
> intel_plane_state *plane_state)
>  {
> -	struct intel_display *display =
> to_intel_display(plane_state);
>  	unsigned int w, h, max_w, max_h;
>  
> -	intel_fbc_max_plane_size(display, &max_w, &max_h);
> +	intel_fbc_max_plane_size(plane_state, &max_w, &max_h);
>  
>  	w = drm_rect_width(&plane_state->uapi.src) >> 16;
>  	h = drm_rect_height(&plane_state->uapi.src) >> 16;