Re: [PATCH v6 9/9] drm/i915/vrr: Enable cmrr

On 7/23/2026 9:51 PM, Borah, Chaitanya Kumar wrote:
> 
> 
> On 7/22/2026 10:09 AM, Mitul Golani wrote:
>> Enable CMRR during compute config and add related state
>> checker for the same.
>>
>> --v2:
>> - Everything else except enable compute to handle before this patch
>> (Chaitanya)
>>
>> --v3:
>> - Remove redundant return from compute config
>>
>> Signed-off-by: Mitul Golani <[email protected]>
>> ---
>>   drivers/gpu/drm/i915/display/intel_vrr.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/ 
>> drm/i915/display/intel_vrr.c
>> index 6bc3ccd62513..ed23a03b0d3d 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -302,6 +302,8 @@ intel_vrr_cmrr_compute_config(struct 
>> intel_crtc_state *crtc_state)
>>       adjusted_mode->crtc_vtotal = div64_u64_rem(dividend,
>>                              crtc_state->vrr.cmrr.cmrr_n,
>>                              &crtc_state->vrr.cmrr.cmrr_m);
>> +
>> +    crtc_state->vrr.cmrr.enable = true;
> 
> We will also need to clear it (and cmrr_n, cmrr_m ) at the beginning of 
> the compute config. If we only have this statement cmrr.enable will 
> always remain true once set as it propagates through duplicated crtc 
> states.
> 

Spoke too soon, intel_crtc_prepare_cleared_state() zeroes the crtc_state 
right before intel_modeset_pipe_config() runs compute. So we should be 
good at that front.

The problem will still lie with CMRR_ENABLE not getting programmed 
during a fastset. It will leave the CMRR registers programmed (to 0s in 
disabled case) but CMRR_ENABLE bit in TRANS_VRR_CTL will not be updated 
as enable_vrr_tg (except in lrr case) and disable_vrr_tg are called only 
on modeset.

>>   }
>>   static
>