[PATCH 00/14] DP-HDMI PCON DSC fixes

The PCON mode_valid path currently does not fully account for the bandwidth
limitations of the PCON <-> HDMI link. The DSC capability between the
PCON and the HDMI sink also needs to be taken into account, which currently
isn't. Furthermore, the compressed bpp chosen needs to fit the
FRL configuration, which is also missing.

This series:
 - reworks the HDMI DSC helpers so they can be reused across the
   mode_valid, compute_config and FRL bandwidth check paths
 - fixes the FRL/TMDS downstream bandwidth checks, and allows
   PCON DSC modes through the FRL check
 - Clamps the programmed DSC bpp to the FRL link bandwidth.

Ankit Nautiyal (14):
  drm/i915/hdmi: Use correct type for output_format parameter
  drm/i915/display: Generalize intel_hdmi_dsc_get_num_slices helper
  drm/i915/display: Pass bpc in intel_hdmi_dsc_get_bpp
  drm/i915/hdmi21/mtl: Split the intel_hdmi_dsc_get_bpp()
  drm/i915/dp: Fix FRL BW check for HDMI2.1 DFP
  drm/i915/dp: Add a wrapper to check frl/tmds downstream constraints
  drm/i915/dp: Use FRL pair check for the DFP dotclock limit
  drm/i915/dp: Use the common downstream bw check in compute_bpc
  drm/i915/hdmi: Expose DSC min/max bpp helpers
  drm/i915/hdmi: Add helper to check if DSC chunksize fits the sink
    limits
  drm/i915/dp: Allow PCON DSC modes through FRL bw check
  drm/i915/dp: Clamp PCON DSC bpp to the FRL link bandwidth
  drm/i915/hdmi: Add helper to get max FRL rate for an HDMI sink
  drm/i915/dp: Use helpers for getting max FRL rate

 drivers/gpu/drm/i915/display/intel_dp.c   | 173 +++++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_hdmi.c | 150 ++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_hdmi.h |  16 +-
 3 files changed, 261 insertions(+), 78 deletions(-)

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2.50.1