RE: [PATCH 03/14] drm/i915/display: Pass bpc in intel_hdmi_dsc_get_bpp
"Kandpal, Suraj" <[email protected]> Mon, 3 Aug 2026 04:53:52 +0000
| Newsgroups | org.freedesktop.lists.intel-gfx,org.freedesktop.lists.intel-xe |
|---|---|
| Message-ID | <DS4PPFE901A304F7078C21B87D927CB9786E3D52@DS4PPFE901A304F.namprd11.prod.outlook.com> |
> Subject: [PATCH 03/14] drm/i915/display: Pass bpc in intel_hdmi_dsc_get_b=
pp
Can be drm/i915/{dp,hdmi} :
Otherwise LGTM,
Reviewed-by: Suraj Kandpal <[email protected]>
>=20
> Generalize intel_hdmi_dsc_get_bpp helper to accept bpc as a parameter
> instead of assuming hardcoded value.
>=20
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 10 +++++-----
> drivers/gpu/drm/i915/display/intel_hdmi.h | 2 +-
> 3 files changed, 8 insertions(+), 7 deletions(-)
>=20
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index db64e6582286..9d6f144d935f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4335,9 +4335,10 @@ intel_dp_pcon_dsc_enc_bpp(struct intel_dp
> *intel_dp,
> int pcon_fractional_bpp =3D drm_dp_pcon_dsc_bpp_incr(intel_dp-
> >pcon_dsc_dpcd);
> int hdmi_max_chunk_bytes =3D
> info->hdmi.dsc_cap.total_chunk_kbytes * 1024;
> + int bpc =3D crtc_state->pipe_bpp / 3;
>=20
> return intel_hdmi_dsc_get_bpp(pcon_fractional_bpp, slice_width,
> - num_slices, output_format, hdmi_all_bpp,
> + num_slices, output_format, bpc,
> hdmi_all_bpp,
> hdmi_max_chunk_bytes);
> }
>=20
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 228c5e2be164..d3efd9e4e86a 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -3333,6 +3333,7 @@ intel_hdmi_dsc_get_num_slices(const struct
> drm_display_mode *mode,
> * @slice_width: dsc slice width supported by the source and sink
> * @num_slices: num of slices supported by the source and sink
> * @output_format: video output format
> + * @bpc: bits per color
> * @hdmi_all_bpp: sink supports decoding of 1/16th bpp setting
> * @hdmi_max_chunk_bytes: max bytes in a line of chunks supported by sin=
k
> *
> @@ -3340,7 +3341,7 @@ intel_hdmi_dsc_get_num_slices(const struct
> drm_display_mode *mode,
> */
> int
> intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int
> num_slices,
> - enum intel_output_format output_format,
> + enum intel_output_format output_format, int bpc,
> bool hdmi_all_bpp, int hdmi_max_chunk_bytes) {
> int max_dsc_bpp, min_dsc_bpp;
> @@ -3358,18 +3359,17 @@ intel_hdmi_dsc_get_bpp(int src_fractional_bpp,
> int slice_width, int num_slices,
> * for each bpp we check if no of bytes can be supported by HDMI sink
> */
>=20
> - /* Assuming: bpc as 8*/
> if (output_format =3D=3D INTEL_OUTPUT_FORMAT_YCBCR420) {
> min_dsc_bpp =3D 6;
> - max_dsc_bpp =3D 3 * 4; /* 3*bpc/2 */
> + max_dsc_bpp =3D 3 * bpc / 2;
> } else if (output_format =3D=3D INTEL_OUTPUT_FORMAT_YCBCR444 ||
> output_format =3D=3D INTEL_OUTPUT_FORMAT_RGB) {
> min_dsc_bpp =3D 8;
> - max_dsc_bpp =3D 3 * 8; /* 3*bpc */
> + max_dsc_bpp =3D 3 * bpc;
> } else {
> /* Assuming 4:2:2 encoding */
> min_dsc_bpp =3D 7;
> - max_dsc_bpp =3D 2 * 8; /* 2*bpc */
> + max_dsc_bpp =3D 2 * bpc;
> }
>=20
> /*
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h
> b/drivers/gpu/drm/i915/display/intel_hdmi.h
> index 4e2228ca0c5b..c3a0e81615e4 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
> @@ -56,7 +56,7 @@ bool intel_hdmi_bpc_possible(const struct
> intel_crtc_state *crtc_state, int intel_hdmi_tmds_clock(int clock, int b=
pc,
> enum intel_output_format sink_format); int intel_hdmi_dsc_get_bpp(int
> src_fractional_bpp, int slice_width,
> int num_slices, enum intel_output_format
> output_format,
> - bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
> + int bpc, bool hdmi_all_bpp, int
> hdmi_max_chunk_bytes);
> int intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
> enum intel_output_format output_format,
> int src_max_slices, int src_max_slice_width,
> --
> 2.50.1