RE: [PATCH] drm/xe/ras: Split RAS init into xe_ras_init_early and xe_ras_init

> -----Original Message-----
> From: Koujalagi, Mallesh <[email protected]>
> Sent: Thursday, July 30, 2026 12:25 PM
> To: [email protected]; Vivi, Rodrigo <[email protected]>;
> Brost, Matthew <[email protected]>
> Cc: Gupta, Anshuman <[email protected]>; Nilawar, Badal
> <[email protected]>; Belgaumkar, Vinay
> <[email protected]>; Tauro, Riana <[email protected]>;
> Poosa, Karthik <[email protected]>; Anirban, Sk
> <[email protected]>; Jadav, Raag <[email protected]>; Koujalagi,
> Mallesh <[email protected]>
> Subject: [PATCH] drm/xe/ras: Split RAS init into xe_ras_init_early and
> xe_ras_init
> 
> xe_ras_init() was doing two unrelated things: setting up internal bookkeeping
> needed before interrupts start, and querying firmware errors that can only be
> done safely after the device is registered.
> 
> Split it into two functions with clear responsibilities:
> 
> - xe_ras_init_early(): runs early, before interrupts are enabled.
> 
> - xe_ras_init(): runs after the device is registered.
I think should send this patch with your Punit handler patch series.
Thanks,
Anshuman
> 
> Signed-off-by: Mallesh Koujalagi <[email protected]>
> ---
>  drivers/gpu/drm/xe/xe_device.c |  4 +++-
>  drivers/gpu/drm/xe/xe_ras.c    | 38 ++++++++++++++++++++++++++--------
>  drivers/gpu/drm/xe/xe_ras.h    |  1 +
>  3 files changed, 33 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.c
> b/drivers/gpu/drm/xe/xe_device.c index 4eed9a251e65..a264f2dd662e
> 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -1007,7 +1007,7 @@ int xe_device_probe(struct xe_device *xe)
>  	if (err)
>  		return err;
> 
> -	xe_ras_init(xe);
> +	xe_ras_init_early(xe);
> 
>  	/*
>  	 * Now that GT is initialized (TTM in particular), @@ -1093,6 +1093,8
> @@ int xe_device_probe(struct xe_device *xe)
> 
>  	xe_debugfs_register(xe);
> 
> +	xe_ras_init(xe);
> +
>  	err = xe_hwmon_register(xe);
>  	if (err)
>  		goto err_unregister_display;
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c index
> a31e06b8aa67..acf713aaf79f 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -672,15 +672,17 @@ static const struct attribute_group
> gpu_health_group = {  };
> 
>  /**
> - * xe_ras_init - Initialize Xe RAS
> + * xe_ras_init_early - Early RAS initialization, before interrupts are
> + enabled
>   * @xe: xe device instance
>   *
> - * Initialize Xe RAS
> + * Sets up the RAS error-counter bookkeeping and PCIe error reporting
> + * before interrupts are enabled. This must happen early because the
> + * interrupt handler reads the error counters set up here; skipping it
> + * would cause boot-time hardware errors to be cleared silently with no
> + * log or count.
>   */
> -void xe_ras_init(struct xe_device *xe)
> +void xe_ras_init_early(struct xe_device *xe)
>  {
> -	int ret;
> -
>  	if (!xe->info.has_drm_ras)
>  		return;
> 
> @@ -692,11 +694,29 @@ void xe_ras_init(struct xe_device *xe)
>  	if (IS_ENABLED(CONFIG_PCIEAER))
>  		ras_usp_aer_init(xe);
> 
> -	/*
> -	 * During probe, process and log any errors detected by firmware
> while the driver was not
> -	 * loaded. Critical errors such as Punit and CSC are reported through
> Pcode init failure,
> -	 * causing the driver to enter survivability mode.
> +	/* TODO: Build the page offline list/queue from early boot errors so
> +	 * faulty pages are excluded before kernel objects are allocated.
>  	 */
> +}
> +
> +/**
> + * xe_ras_init - RAS initialization, after device registration
> + * @xe: xe device instance
> + *
> + * Queries firmware for any hardware errors that occurred before the
> +driver
> + * loaded and creates the gpu_health sysfs entry. Must run after the
> +device
> + * is registered so that kernel events and sysfs paths work correctly.
> + *
> + * By the time this runs, critical boot failures (Punit, CSC) have
> +already
> + * been caught and handled via the survivability mode path.
> + */
> +void xe_ras_init(struct xe_device *xe)
> +{
> +	int ret;
> +
> +	if (!xe->info.has_drm_ras || !xe->info.has_sysctrl)
> +		return;
> +
>  	xe_ras_process_errors(xe);
>  	ret = devm_device_add_group(xe->drm.dev, &gpu_health_group);
>  	if (ret)
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h index
> 618364734043..c28711470861 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -16,6 +16,7 @@ void xe_ras_counter_threshold_crossed(struct
> xe_device *xe,
>  				      struct xe_sysctrl_event_response
> *response);  int xe_ras_get_counter(struct xe_device *xe, u8 severity, u8
> component, u32 *value);  int xe_ras_clear_counter(struct xe_device *xe, u8
> severity, u8 component);
> +void xe_ras_init_early(struct xe_device *xe);
>  void xe_ras_init(struct xe_device *xe);  enum xe_ras_recovery_action
> xe_ras_process_errors(struct xe_device *xe);
> 
> --
> 2.48.1