[PATCH v5 2/3] drm/xe/guc_ads: allocate UM queues in VRAM on dGFX

On pre-Xe3p dGFX, GuC/GAM accesses the UM queue ring buffer via
base_dpa, which is interpreted as a raw device-physical address.
Unlike the GGTT PTE, there is no flag to indicate whether base_dpa
points to VRAM or system memory; the hardware assumes it is always
a VRAM address.

A separate SYSTEM BO for the UM queues would cause xe_bo_main_addr()
to return an IOMMU IOVA instead of a true VRAM device-physical address.
GuC then accesses the wrong memory and forwards all-zero fault
descriptors to the driver (Faulted Address = 0, ASID = 0).

Use XE_BO_FLAG_VRAM_IF_DGFX() so that on dGFX the UM queue BO is
placed directly in VRAM and xe_bo_main_addr() returns the correct
device-physical address.

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Cc: Gwan-gyeong Mun <[email protected]>
Cc: Matthew Auld <[email protected]>
Cc: [email protected]
Signed-off-by: Jia Yao <[email protected]>
---
 drivers/gpu/drm/xe/xe_guc.c     |  6 ------
 drivers/gpu/drm/xe/xe_guc_ads.c | 11 ++++++-----
 2 files changed, 6 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 4f132bf8539d..4286bd05c686 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -732,12 +732,6 @@ static int xe_guc_realloc_post_hwconfig(struct xe_guc *guc)
 	if (ret)
 		return ret;
 
-	if (guc->ads.um_queue_bo) {
-		ret = xe_managed_bo_reinit_in_vram(xe, tile, &guc->ads.um_queue_bo);
-		if (ret)
-			return ret;
-	}
-
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index 3b6e1c45a0e9..57a0614dbf6d 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -461,11 +461,12 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
 		size_t um_size = roundup_pow_of_two(GUC_UM_QUEUE_SIZE *
 						    GUC_UM_HW_QUEUE_MAX);
 
-		bo = xe_managed_bo_create_pin_map(xe, tile, um_size,
-						  XE_BO_FLAG_SYSTEM |
-						  XE_BO_FLAG_GGTT |
-						  XE_BO_FLAG_GGTT_INVALIDATE |
-						  XE_BO_FLAG_PINNED_NORESTORE);
+		u32 um_flags = XE_BO_FLAG_VRAM_IF_DGFX(tile) |
+			       XE_BO_FLAG_GGTT |
+			       XE_BO_FLAG_GGTT_INVALIDATE |
+			       XE_BO_FLAG_PINNED_NORESTORE;
+
+		bo = xe_managed_bo_create_pin_map(xe, tile, um_size, um_flags);
 		if (IS_ERR(bo))
 			return PTR_ERR(bo);
 
-- 
2.43.0