[PATCH 3/5] drm/i915/{dp,hdmi}: Pass bpc in intel_hdmi_dsc_get_bpp
Ankit Nautiyal <[email protected]> Wed, 5 Aug 2026 09:20:25 +0530
| Newsgroups | org.freedesktop.lists.intel-xe,org.freedesktop.lists.intel-gfx |
|---|---|
| Message-ID | <[email protected]> |
Generalize intel_hdmi_dsc_get_bpp helper to accept bpc as a parameter
instead of assuming hardcoded value.
v2: Add {dp,hdmi} in subject prefix. (Suraj)
Signed-off-by: Ankit Nautiyal <[email protected]>
Reviewed-by: Suraj Kandpal <[email protected]>
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
drivers/gpu/drm/i915/display/intel_hdmi.c | 10 +++++-----
drivers/gpu/drm/i915/display/intel_hdmi.h | 2 +-
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 76d8ebecec32..d029cea1055d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4340,9 +4340,10 @@ intel_dp_pcon_dsc_enc_bpp(struct intel_dp *intel_dp,
int pcon_fractional_bpp = drm_dp_pcon_dsc_bpp_incr(intel_dp->pcon_dsc_dpcd);
int hdmi_max_chunk_bytes =
info->hdmi.dsc_cap.total_chunk_kbytes * 1024;
+ int bpc = crtc_state->pipe_bpp / 3;
return intel_hdmi_dsc_get_bpp(pcon_fractional_bpp, slice_width,
- num_slices, output_format, hdmi_all_bpp,
+ num_slices, output_format, bpc, hdmi_all_bpp,
hdmi_max_chunk_bytes);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 228c5e2be164..d3efd9e4e86a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3333,6 +3333,7 @@ intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
* @slice_width: dsc slice width supported by the source and sink
* @num_slices: num of slices supported by the source and sink
* @output_format: video output format
+ * @bpc: bits per color
* @hdmi_all_bpp: sink supports decoding of 1/16th bpp setting
* @hdmi_max_chunk_bytes: max bytes in a line of chunks supported by sink
*
@@ -3340,7 +3341,7 @@ intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
*/
int
intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
- enum intel_output_format output_format,
+ enum intel_output_format output_format, int bpc,
bool hdmi_all_bpp, int hdmi_max_chunk_bytes)
{
int max_dsc_bpp, min_dsc_bpp;
@@ -3358,18 +3359,17 @@ intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
* for each bpp we check if no of bytes can be supported by HDMI sink
*/
- /* Assuming: bpc as 8*/
if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
min_dsc_bpp = 6;
- max_dsc_bpp = 3 * 4; /* 3*bpc/2 */
+ max_dsc_bpp = 3 * bpc / 2;
} else if (output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
output_format == INTEL_OUTPUT_FORMAT_RGB) {
min_dsc_bpp = 8;
- max_dsc_bpp = 3 * 8; /* 3*bpc */
+ max_dsc_bpp = 3 * bpc;
} else {
/* Assuming 4:2:2 encoding */
min_dsc_bpp = 7;
- max_dsc_bpp = 2 * 8; /* 2*bpc */
+ max_dsc_bpp = 2 * bpc;
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index 4e2228ca0c5b..c3a0e81615e4 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -56,7 +56,7 @@ bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
int intel_hdmi_tmds_clock(int clock, int bpc, enum intel_output_format sink_format);
int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
int num_slices, enum intel_output_format output_format,
- bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
+ int bpc, bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
int intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
enum intel_output_format output_format,
int src_max_slices, int src_max_slice_width,
--
2.50.1